User:RastaKins/sandbox2
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General concepts |
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In computing, an opcode prefix is an numeric value that alters the function of a following opcode. On some instruction set architectures multiple opcode prefixes are allowed sequentially, with all combining to alter the subsequent opcode. The opcode prefix is a portion of a larger machine language instruction that specifies the operation to be performed.
In addition to the opcode, some instructions specify the data (known as operands) the operation will act upon, although some instructions may have implicit operands or none. Opcode prefixes may alter the number or length of the operands.
RISC processors do not use opcode prefixes.
Types of prefixes
[edit]Opcode prefixes generally fall into two categories:
1. Opcode prefixes that alter subsequent opcode functions.
1. Opcode prefixes that enable an alternate set of opcodes. This is analogous to the shift key on a keyboard. In this way, instruction sets can be extended by adding a subset of new instructions made up of existing reserved opcodes.
Example opcode prefixes
[edit]The following is not intended to be an exhaustive list of opcode prefixes but instead is intended to show how opcode prefixes have been used in various CPU instruction set architectures.
Microcontroller
[edit]The National Semiconductor COP8 is an 8-bit microcontroller introduced in 1988. COP8 is an enhancement to National's earlier COP400 4-bit microcontroller family.
Normally, absolute RAM addressing is only directly encoded for just four instructions: LD A,addr8
, X A,addr8
, IFEQ addr8,#imm8
, and LD addr8,#imm8
. A two-byte DIR
opcode prefix may be prepended to any other instruction that normally uses the B index register to access memory to convert that instruction to absolute RAM addressing. The prefix is 0xBD followed by an 8-bit absolute address. This prefix is unusual in that it is two bytes instead of one.[1]
8-bit microprocessor
[edit]The Zilog Z80 is an 8-bit microprocessor that was launched in 1976. It was designed to be backward software-compatible with the Intel 8080.
In order to access its new IX and IY registers, 0xDD or 0xFE is prepended to the old 8080 instructions, allowing those instructions to substitute IX+displacement or IY+displacement respectively as memory pointers in place of HL. In cases where HL is accessed directly, no displacement is encoded.
0xCB and 0xED enable new instructions not found on the 8080, but these are the first byte of a 16-bit opcode rather than a prefix. The 0xDD or 0xFE IX/IY prefixes can prepend any 0xCB and 0xED new instruction that uses HL.
16-bit microprocessor
[edit]The Intel 8086 and 8088 have three types of prefixes, all which can be[note 1] combined to alter some subsequent instructions.
Segment override: Normally the data segment (DS) is used for most data accesses and the stack segment (SS) is used for any accesses involving BP. One-byte segment override prefixes are provided to substitute ES, CS, SS, or DS.
Repeat: String instructions LODS
, STOS
, MOVS
, CMPS
, and SCAS
normally execute just one iteration. If a REP
prefix is prepended to any string instruction, it will repeat CX times. The CMPS
and SCAS
instructions might terminate early if their equal or not equal conditions are satisfied. These instructions can be combined with segment override prefix for the source string.
Lock: The LOCK
prefix is used with a read-modify-write instructions such as INC
, DEC
, or XCHG
to insure that another bus master cannot interfere with the read or write operation. LOCK
can be combined with segment override prefix.
64-bit microprocessor
[edit]See also
[edit]References
[edit]- ^ COP8 Basic Family User's Manual (PDF). Revision 002. National Semiconductor. June 1996. Literature Number 620895-002. Retrieved 2021-01-02.
Notes
[edit]- ^ There is a bug in the 8086 that causes multiple prefixes on string operations to be forgotten when an interrupt is acknowledged.