User:Nandasan

Sanjoy Nanda

Occupation: IC Design Engineer

Sanjoy is presently working in the area of IC Deisgn with specific focus on Design for Test for mobile chip-sets. 

He has good number of years of experience with DFT Verification, Simulation debug, Power aware GLS, ATPG, Post Silicon Bring-up, debug and Failure analysis. 

Prior to Qualcomm he worked for a short period of time with ST Microelectronics APG division which is the automotive products division with focus on RTL X-Bounding, test logic integration at RTL for Logic BIST and ATPG. 

Before STMicro, Sanjoy worked with SanDisk India where he was responsible for end to end DFT activities for USB & SD micro controllers for SanDisk flagship USB/SD devices.
 
At SanDisk he worked on the entire spectrum of DFT form RTL logic integration for test, MBIST, Scan Insertion, MBIST Simulations, SCAN Simulations and debug, Bring-up of vectors on ATE and so on.

Area of Expertise: DFT, Test and verification, Timing analysis, CMOS Digital Design

Sanjoy has a number of years of experience in IC Design with specific focus on DFT, test and verification, synthesis and Timing analysis. 

He is also experienced in designing and verifying CMOS digital logic with Virtuoso and LTSpice.