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- New page
- m
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25 June 2025
- diffhist Intel 04:15 −11 Maxeto0910 talk contribs (→Reorganization and success with Intel Core (2005–2015): actually using just the brand name is fine in this context) Tags: Manual revert Mobile edit Mobile web edit Advanced mobile edit
- diffhist Intel 04:14 0 Maxeto0910 talk contribs Tags: Reverted Mobile edit Mobile web edit Advanced mobile edit
- diffhist Intel 01:17 +11 2607:fea8:fc10:7f4d:d898:f69:14cd:7b44 talk (→Reorganization and success with Intel Core Processors (2005–2015)) Tags: Reverted Mobile edit Mobile web edit
- diffhist m CPU cache 00:25 0 GreenDevolution talk contribs (Minor fix to make use of higher/lower level consistent) Tag: Visual edit
24 June 2025
- diffhist CPU cache 14:57 +66 GreenDevolution talk contribs (Make usage of higher/lower cache levels consistent. Hennessy and Patterson describe L1 cache as the highest-level cache.) Tag: Visual edit
- diffhist Intel 13:13 −2 Maxeto0910 talk contribs (more common and natural-sounding term in this context) Tags: Visual edit Mobile edit Mobile web edit Advanced mobile edit
23 June 2025
- diffhist PowerPC 600 18:40 +526 113.157.217.50 talk (Changes to reflect the bus lineage of the 6XX and POWER4 designs. I can't find any reference to the 'snake' chips. The variate with Orca was called Race/Whip to bridge 6xx , DRAM, and MX. MX to PCI was the Python chip.)
21 June 2025
- diffhist Intel 23:06 +4 Maxeto0910 talk contribs (→Ownership: see its article) Tag: Visual edit
- diffhist Intel 21:13 +1 Maxeto0910 talk contribs (→'IDM 2.0' strategy) Tag: Visual edit
- diffhist Intel 21:12 −35 Maxeto0910 talk contribs (→'IDM 2.0' strategy: removed "needs update" tag which I once added because it doesn't apply anymore) Tag: Visual edit
20 June 2025
- diffhist Microprocessor 22:52 −9 Em3rgent0rdr talk contribs (→Structure: For Z80's caption, add the year, and instead of just listing everything in the diagram, say something interesting instead: that it uses 8-bit data but 16-bit addresses.) Tag: Visual edit
- diffhist Microprocessor 20:35 −208 Em3rgent0rdr talk contribs (Put images of microprocessors in order and with year in parenthesis. There was too big of a jump from 8-bit to 64-bit, so instead have one notable 4-bit, one notable 8-bit, one notable 16-bit, one notable 32-bit, all of different companies.) Tag: Visual edit
19 June 2025
- diffhist X86 01:54 +4 RastaKins talk contribs (→Basic properties of the architecture: Opcode prefix wikilink)
18 June 2025
- diffhist X86 23:38 −33 RastaKins talk contribs (BP is certainly a general-purpose register. It can be the source or destination of any ALU operation. It can even can be used in addressing modes unlike AX, CX, and DX.)
- diffhist X86 22:26 +1 Anastrophe talk contribs (move discourse on the question of open source into body of article, rather than infobox.)