Talk:Quasi-delay-insensitive circuit

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TODO

In formal synthesis, add and reference other production rule generation algorithms
In chips, add and reference a larger variety of QDI processors, and add descriptions to existing ones
More in-depth descriptions of each logic family
In syntax-directed translation, add reference to the tangram compiler
References and other approaches to verification
add a section for QDI gate and trasistor sizing (the optimal PN ratio for QDI is different than typical sizing)

I completed all of the previous TODO's and made sure to keep MOS:CAPS, I figured that the article is no longer a stub and that other issues have been resolved. Let me know if you think there are some things missing before this can happen. Ned Bingham (talk) 15:51, 14 October 2017 (UTC)[reply]

Sounds good, but see MOS:CAPS and avoid capping things that are not proper names; i.e., it's weak condition half buffer (WCHB); or more likely weak-condition half buffer (WCHB). Dicklyon (talk) 05:16, 12 October 2017 (UTC)[reply]

Chat

I'm a PhD student in Rajit Manohar's research group, so my perspective on QDI circuits will primarily be framed within the sphere of influence of Alain Martin and his students at Cal-tech namely Rajit Manohar, Steven Burns, Tony Lee, Steven Nowick, and Andrew Lines. Other perspectives are greatly desired! Ned Bingham (talk) 02:06, 12 October 2017 (UTC)[reply]

And note that Caltech does not need a hyphen. Alain is an old bud of mine. Dicklyon (talk) 05:17, 12 October 2017 (UTC)[reply]

Unusual footnotes style

@Talon4196: May it worth to use more conventional, numeric style footnotes? Citations grouped by name feel very unconfortable... Somehow. Any objections? AXONOV (talk) ⚑ 21:06, 3 December 2021 (UTC)[reply]

No objections, go for it :) Ned Bingham (talk) 16:39, 23 May 2023 (UTC)[reply]