Draft:Chronologic Simulation
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Last edited by 51.219.219.250 (talk | contribs) 3 days ago. (Update) |
 | This article relies largely or entirely on a single source. (May 2025) |
| Company type | Private |
|---|---|
| Headquarters | Los Altos, California, United States |
Key people |
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Chronologic Simulation, Inc. was a Los Altos, California, USA, based provider of Verilog HDL simulation products. Chronologic Simulation’s main product was VCS (Verilog Compiled Simulator). In 1994 Chronologic was sold to Viewlogic Systems and in 1997 Viewlogic was acquired by Synopsys, Inc. where VCS remains its main HDL simulation offering.
History
In the late 1980s and early 1990s integrated circuits were being designed and verified in Verilog HDL simulators. These simulators were focused on gate level speed and were implemented as language interpreters. Verilog HDL was proprietary and owned by Cadence Design Systems after their acquisition of Gateway Design Automation, the developers of Verilog.
There was competition to Verilog from the US DoD VHDL language and in 1991 Cadence made the Verilog HDL public and created Open Verilog International to standardize it. The founders of Chronologic saw an opportunity to adopt software compiler techniques and created a fast compiled code Verilog simulator.