Hardware description language: Revision history

17 January 2025

• curprev 07:3007:30, 17 January 2025 GreenC bot talk contribs 36,083 bytes −29 Rescued 1 archive link; reformat 1 link. Wayback Medic 2.5 per Category:All articles with dead external links undo

4 December 2024

• curprev 10:0810:08, 4 December 2024 2001:240:240a:7882:0:13:2098:d701 talk 36,112 bytes +83 Add Veryl undo Tags: Visual edit Mobile edit Mobile web edit

23 October 2024

• curprev 20:3720:37, 23 October 2024 Nyq talk contribs m 36,029 bytes 0 →HDLs for digital circuit design: lc common noun undo Tag: Visual edit

4 October 2024

• curprev 15:2715:27, 4 October 2024 Perchema talk contribs m 36,029 bytes 0 →HDLs for digital circuit design: fix alphabetical sorting undo

24 September 2024

• curprev 01:2801:28, 24 September 2024 Liz talk contribs m 36,029 bytes −14 Removing link(s) Wikipedia:Articles for deletion/OpenVera closed as soft delete (XFDcloser) undo

3 September 2024

• curprev 19:1819:18, 3 September 2024 Crepegoat talk contribs m 36,043 bytes +83 →HDLs for digital circuit design: added Filament Lang to the list of HDL's undo Tag: Visual edit

23 August 2024

• curprev 13:0113:01, 23 August 2024 Jerryobject talk contribs 35,960 bytes +22 Small WP:COPYEDITs WP:EoS WP:TERSE, clarify WP:IDIOM > WP:FORMAL. MOS:FIRSTABBReviations clarify, define before WP:ABBRs in parentheses. WP:LINKs: needless WP:PIPEs > WP:NOPIPEs, adds, update-standardize. WP:REFerence WP:CITation parameters: update-standardize-conform, reorders. undo

20 August 2024

• curprev 11:2711:27, 20 August 2024 Jerryobject talk contribs 35,938 bytes −112 →HDLs for digital circuit design: WP:LINKs: adds, update-standardizes, needless WP:PIPEs > WP:NOPIPEs, cuts: WP:REPEATLINK in same sentence, WP:REDs until articles exist. MOS:FIRSTABBReviations clarify, define before WP:ABBRs in parentheses. Small WP:COPYEDITs WP:EoS: WP:TERSE, clarify. undo

18 August 2024

• curprev 15:3915:39, 18 August 2024 149.8.13.148 talk 36,050 bytes −1 Fixed syntax error in VHDL example: Deleted extra semicolon undo

12 July 2024

• curprev 04:0204:02, 12 July 2024 InternetArchiveBot talk contribs 36,051 bytes +72 Rescuing 0 sources and tagging 1 as dead.) #IABot (v2.0.9.5 undo

21 May 2024

• curprev 19:5719:57, 21 May 2024 KosmicIan talk contribs m 35,979 bytes 0 →HDLs for digital circuit design undo
• curprev 19:5119:51, 21 May 2024 KosmicIan talk contribs 35,979 bytes +233 →add HDLs for digital circuit design undo

17 May 2024

• curprev 21:2821:28, 17 May 2024 Elecxr talk contribs 35,746 bytes +432 →HDLs for printed circuit board design undo
• curprev 21:2221:22, 17 May 2024 Elecxr talk contribs 35,314 bytes +142 →HDLs for printed circuit board design undo

15 May 2024

• curprev 19:1319:13, 15 May 2024 Elecxr talk contribs m 35,172 bytes −10 →Removed redundant phrase "an electronic circuit" for clarity undo Tag: Visual edit

13 May 2024

• curprev 00:0700:07, 13 May 2024 74.64.146.201 talk 35,182 bytes +4 Fix table formatting for added rows undo
• curprev 00:0100:01, 13 May 2024 74.64.146.201 talk 35,178 bytes +201 Adding `migen` and `nMigen`, two well established HDLs undo

25 April 2024

• curprev 15:0515:05, 25 April 2024 MutigeEchse talk contribs 34,977 bytes +5 Add PyMTL3 undo

19 March 2024

• curprev 00:2100:21, 19 March 2024 MutigeEchse talk contribs 34,972 bytes −14 Remove invalid page link for KARL undo Tag: Visual edit: Switched

18 March 2024

• curprev 23:5823:58, 18 March 2024 MutigeEchse talk contribs 34,986 bytes +472 Restructure HDL table similar to article on High-level synthesis undo Tag: Visual edit: Switched
• curprev 23:0623:06, 18 March 2024 MutigeEchse talk contribs 34,514 bytes +142 Add DSLX language undo Tag: Visual edit: Switched

21 February 2024

• curprev 20:3620:36, 21 February 2024 Digital27 talk contribs 34,372 bytes 0 Undid revision 1209264344 by 24.188.225.45 (talk) undo Tag: Undo
• curprev 02:0502:05, 21 February 2024 24.188.225.45 talk 34,372 bytes 0 No edit summary undo Tags: Reverted Visual edit Mobile edit Mobile web edit

16 January 2024

• curprev 21:3021:30, 16 January 2024 Maxeto0910 talk contribs m 34,372 bytes −4 No edit summary undo Tag: Visual edit

1 January 2024

• curprev 10:5610:56, 1 January 2024 Digital27 talk contribs 34,376 bytes +80 Clarify what HDL is used for undo Tag: Visual edit

24 November 2023

• curprev 07:5807:58, 24 November 2023 Alexeyevitch talk contribs m 34,296 bytes −26 Reverted edit by 154.80.92.147 (talk) to last version by 58.120.121.19 undo Tag: Rollback
• curprev 07:5807:58, 24 November 2023 154.80.92.147 talk 34,322 bytes +26 No edit summary undo Tags: Reverted Mobile edit Mobile web edit

20 September 2023

• curprev 17:1217:12, 20 September 2023 58.120.121.19 talk 34,296 bytes −70 →External links: link not working! undo

4 June 2023

• curprev 20:0920:09, 4 June 2023 ComancheRAIN talk contribs 34,366 bytes −17 No edit summary undo Tags: Visual edit Mobile edit Mobile web edit

5 January 2023

• curprev 21:1321:13, 5 January 2023 Daniel talk contribs m 34,383 bytes −4 Removing link(s) Wikipedia:Articles for deletion/JHDL closed as soft delete (XFDcloser) undo

7 April 2022

• curprev 03:1003:10, 7 April 2022 18.31.31.27 talk 34,387 bytes +169 →HDLs for digital circuit design undo

17 February 2022

• curprev 19:1419:14, 17 February 2022 Xiretza talk contribs 34,218 bytes +11 →HDLs for digital circuit design: Rename nMigen to Amaranth undo

11 February 2022

• curprev 00:0400:04, 11 February 2022 Allforrous talk contribs 34,207 bytes +13 →External links: Commonscat template. undo

22 December 2021

• curprev 22:5322:53, 22 December 2021 Alexander Davronov talk contribs 34,194 bytes +53 →HDLs for digital circuit design undo Tag: Visual edit

20 November 2021

• curprev 06:3806:38, 20 November 2021 Citation bot talk contribs 34,141 bytes +74 Alter: template type. Add: date, website, s2cid. | Use this bot. Report bugs. | Suggested by Abductive | #UCB_toolbar undo

18 November 2021

• curprev 13:4913:49, 18 November 2021 HTW217 talk contribs 34,067 bytes +19 A HDL is not "an automated tool"; it is a kind of computer language for describing hardware that is implemented by automated tools for various things (logic synthesis, formal verification, simulation, etc.) undo

13 November 2021

• curprev 18:2918:29, 13 November 2021 Maxtremus talk contribs 34,048 bytes +23 →External links: +{{Digital electronics}} undo

8 October 2021

• curprev 19:5119:51, 8 October 2021 Reidgreg talk contribs 34,025 bytes −92 Changing short description from "Specialized computer language used to describe the structure and behavior of electronic circuits, and most commonly, digital logic circuits" to "Automated design tool which describes circuitry" (Shortdesc helper) undo

27 September 2021

• curprev 15:3115:31, 27 September 2021 Mkorbel1 talk contribs 34,117 bytes +274 →HDLs for digital circuit design undo

20 September 2021

• curprev 15:0115:01, 20 September 2021 192.55.55.52 talk 33,843 bytes +364 →High-level synthesis: Added a few clarifying details. undo Tag: Visual edit

24 August 2021

• curprev 15:5515:55, 24 August 2021 JoeNMLC talk contribs 33,479 bytes +20 →See also: additional, add col.list undo

23 July 2021

• curprev 23:2923:29, 23 July 2021 Comp.arch talk contribs m 33,459 bytes 0 No edit summary undo Tag: 2017 wikitext editor

8 June 2021

• curprev 02:5102:51, 8 June 2021 100.14.185.173 talk 33,459 bytes +202 Adding PipelineC entry undo

5 June 2021

• curprev 22:2022:20, 5 June 2021 188.142.171.86 talk 33,257 bytes −14 →Design using HDL undo Tag: Manual revert
• curprev 22:1922:19, 5 June 2021 188.142.171.86 talk 33,271 bytes +14 →Design using HDL undo Tag: Reverted

3 June 2021

• curprev 08:1708:17, 3 June 2021 Citation bot talk contribs 33,257 bytes +13 Alter: template type. Add: authors 1-1. Removed parameters. Some additions/deletions were parameter name changes. | Use this bot. Report bugs. | Suggested by Abductive | Category:All articles that are too technical | #UCB_Category 1062/2865 undo

21 May 2021

• curprev 03:4703:47, 21 May 2021 174.6.24.46 talk 33,244 bytes +1 →Motivation: fix spacing undo

13 April 2021

• curprev 06:5906:59, 13 April 2021 192.33.101.44 talk 33,243 bytes +43 No edit summary undo

3 April 2021

• curprev 14:2814:28, 3 April 2021 HTW217 talk contribs 33,200 bytes −284 →History: Replace the cited paper with the correct paper; the cited paper is irrelevant to the article's topic (HDLs) and does not verify the statement it is associated with; it appears it was mistakenly introduced during conversion of existing references to templates at 2020-03-24T00:28 undo
• curprev 13:0513:05, 3 April 2021 HTW217 talk contribs 33,484 bytes +180 →HDLs for analog circuit design: Add some context undo