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- D
- Edit made at Wikidata
- r
- Edit flagged by ORES
- N
- New page
- m
- Minor edit
- b
- Bot edit
- (±123)
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27 July 2025
- diffhist PCI Express 15:56 +23 98.118.6.168 talk (→PCI Express 4.0: Added link to a conference reference.)
- diffhist PCI Express 15:52 +12 98.118.6.168 talk (→PCI Express 4.0: Edited the readbility of a paragraph.)
- diffhist PCI Express 15:49 +38 98.118.6.168 talk (→PCI Express 4.0: Added links to company Wikipedia pages.)
- diffhist PCI Express 15:22 −19 98.118.6.168 talk (→PCI Express 3.0: No need to expand an acronym here.)
- diffhist Single instruction, multiple data 06:48 +3 Lkcl talk contribs (→Disadvantages: clarity on difference between VP and SIM. also someone used RVV as a sole-exclusive example: referring to VP and "Cray-style" feels better) Tags: Mobile edit Mobile web edit Advanced mobile edit
- diffhist Single instruction, multiple data 06:37 +199 Lkcl talk contribs (refer to diff between SIMD and VP) Tags: Mobile edit Mobile web edit Advanced mobile edit
- diffhist Single instruction, multiple data 06:32 +73 Lkcl talk contribs (move clarification of SIMD not being Vector processing further up the page) Tags: Mobile edit Mobile web edit Advanced mobile edit
- diffhist Single instruction, multiple data 06:27 +195 Lkcl talk contribs (→History: mention TX-2 in history of SIMD) Tags: Mobile edit Mobile web edit Advanced mobile edit
- diffhist Single instruction, multiple data 06:23 −261 Lkcl talk contribs (bit of clarification, people will conflate SWAR with lanes with Vector Processing etc...) Tags: Mobile edit Mobile web edit Advanced mobile edit
26 July 2025
- diffhist Die (integrated circuit) 23:45 −1 Maxeto0910 talk contribs (→Images: no sentence) Tag: Visual edit
- diffhist DisplayPort 22:01 +300 Dmoews talk contribs (→USB-C: for clarity, repeat earlier remark that dual-mode dp is not supported over usb-c)
- diffhist Single instruction, multiple data 11:10 +50 Lkcl talk contribs (→Chronology: highlight that ILLIAC IV was made up of scalar 64-bit PEs not SIMD PEs) Tags: Mobile edit Mobile web edit Advanced mobile edit
- diffhist Single instruction, multiple data 11:06 +52 Lkcl talk contribs (Array Processors do not ''have'' to have Processing Elements that are SIMD themselves.) Tags: Mobile edit Mobile web edit Advanced mobile edit
- diffhist Single instruction, multiple data 11:03 +55 Lkcl talk contribs (mention SIMD lanes and clarify a little by mentioning SWAR) Tags: Mobile edit Mobile web edit Advanced mobile edit
25 July 2025
- diffhist m AMD 18:53 +3 Trzb talk contribs (→2020–present: sign -> signed)
- diffhist AMD 18:52 +348 Sylphoid talk contribs (spacing, move CEOs to corporate section, start acquisition section)
- diffhist Single instruction, multiple data 13:16 +73 Lkcl talk contribs (add see also for SWAR and SIMT) Tags: Mobile edit Mobile web edit Advanced mobile edit
- diffhist Single instruction, multiple data 13:09 +82 Lkcl talk contribs (→History: Early true-vector processors were not SIMD. they did vector chaining. VPs were too complex and inspired SWAR.) Tags: Mobile edit Mobile web edit Advanced mobile edit
- diffhist Single instruction, multiple data 12:51 +192 Lkcl talk contribs (mention control signals) Tags: Mobile edit Mobile web edit Advanced mobile edit
- diffhist Single instruction, multiple data 12:42 +233 Lkcl talk contribs (added screenshot from ARPA-funded "unlimited distribution" document, July 15 1971, just for fits and giggles. the image is also used in an academic paper) Tags: Mobile edit Mobile web edit Advanced mobile edit
- diffhist Single instruction, multiple data 12:38 −242 Lkcl talk contribs (add ILLIAC IV reference. nyer nyer to NVIDIA who claimed they were first. sorry, ILLIAC beat ya by 50 years :)) Tags: Mobile edit Mobile web edit Advanced mobile edit
- diffhist m AMD 06:46 +4 Trzb talk contribs (→2020–present: added a "the")
- diffhist AMD 06:45 +697 Trzb talk contribs (→2020–present: AMD is catching up with Intel in the server market)
- diffhist m AMD 06:38 +21 Trzb talk contribs (→2006–present: split this subsection at 2020)
24 July 2025
- diffhist Control register 20:13 0 Guy Harris talk contribs (→CR0: Avoid redirect.)
- diffhist Control register 20:11 +319 Guy Harris talk contribs (→Control registers in Intel x86 series: Clarify what the NE bit does. Link to IBM-compatible PC for "PC" in "PC-style". Note that it's 486 and later, as it's for causing the *internal* FPU to report errors through external hardware similar to what was used with external x87 coprocessors.)
- diffhist GlobalFoundries 20:02 +66 70.26.179.154 talk (→Fab 6)
- diffhist Control register 18:54 +22 Hexware talk contribs (→Control registers in Intel x86 series: clarify that "PC style" means 5150-style (external FPU)) Tag: 2017 wikitext editor
- diffhist m Freedesktop.org 14:55 −8 Nathan Hadley (Pigeon) talk contribs (Remove mention of "X-based desktops". Most desktops are now Wayland-first or at least support Wayland) Tag: Visual edit
23 July 2025
- diffhist m Compute Express Link 18:06 +32 Folkezoft talk contribs (Added 1 {{Bare URL PDF}} tag(s) using a script. For other recently-tagged pages with bare URLs, see Category:Articles with bare URLs for citations from July 2025 and Category:Articles with PDF format bare URLs for citations)
22 July 2025
- diffhist TSMC 21:20 −432 GuardianH talk contribs (dubious and LSI went defunct in 2014) Tag: Visual edit
- diffhist m 5 nm process 00:50 0 RedBlackAkaKuro talk contribs (Correct a colspan)
- diffhist m 5 nm process 00:47 −20 RedBlackAkaKuro talk contribs (Put 4N process under 4nm, more accurate and following Nvidia's own whitepapers)
21 July 2025
- diffhist PCI Express 16:55 +5 70.71.233.158 talk (Not wires but pins) Tags: Mobile edit Mobile web edit