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D: Edit made at Wikidata
r: Edit flagged by ORES
N: New page
m: Minor edit
b: Bot edit
(±123): Page byte size change
: Temporarily watched page

28 April 2025

diffhist Raptor Lake 22:37 +11 98.151.187.117 talk (→Raptor Lake-S Refresh: Specified underlying architecture in lower specced Raptor Lake Refresh) Tag: Visual edit
diffhist Raptor Lake 22:34 −1 98.151.187.117 talk (→Raptor Lake-S: Regrouped Alder Lake processors as main distinction is 20MB L3 cache) Tag: Visual edit

27 April 2025

diffhist Arrow Lake (microprocessor) 19:02 +22 JimGrassroot talk contribs (→Architecture)
diffhist m Arrow Lake (microprocessor) 18:59 +22 JimGrassroot talk contribs (→Architecture)
diffhist m Arrow Lake (microprocessor) 16:33 +4 JimGrassroot talk contribs (→Memory controller)
diffhist Socket SP5 05:39 +220 87.92.167.201 talk (chipset info is quite essential in connection with processor sockets and helpful to add (that said, it's hard to find info about AMD chipsets for Epyc))

26 April 2025

diffhist DIMM 20:39 −23 Abhijnvb talk contribs (Unrelated example)

25 April 2025

diffhist Alder Lake 04:24 +73 114.76.110.58 talk (→Dies: Added H and HX) Tag: Visual edit

23 April 2025

diffhist m Bandwidth (computing) 00:03 −3 Balazer talk contribs (Signal bandwidth applies equally to digital and analog encodings. The word "analog" should not have been there. In fact the linked page doesn't say "analog" once.)