QorIQ
Vorlage:Power ArchitectureQorIQ is Freescale's brand of future 32-bit Power Architecture based communications microcontrollers. It is the evolutionary step from the PowerQUICC platform and will be built around one or more Power Architecture e500mc cores and come in five different product platforms, P1, P2, P3, P4 and P5, segmented by performance and functionality. The platform keeps software compatibility with older PowerPC products such as the PowerQUICC platform.
The QorIQ brand and the P1, P2 and P4 product families was announced in June 2008. Details of P3 and P5 products are yet to be announced.
All QorIQ processors will be manufactured on a 45 nm fabrication process and will be available in the end of 2008 (P1 and P2) and mid 2009 (P4). The roadmap stretched beyond the 32 nm process, and all are pushing a very aggressive power envelope target, capping at 30 W.
Products
All QorIQ processors are based on Power Architecture e500v2 cores. As such each processor core shares a common feature set such as 32/32 kB data/instruction L1 cache, 36-bit physical memory addressing, a double precision floating point unit and support for virtualization through a hypervisor layer. The dual and multi-core devices will be supporting both symmetric and asymmetric multiprocessing, and can run multiple operating systems in parallel.
P1
The P1 series is tailored for gateways, Ethernet switches, wireless LAN access points, and general-purpose control applications. It is the entry level platform, ranging from 400 to 800 MHz devices. It is designed to replace the PowerQUICC II Pro and PowerQUICC III platforms. The chips include among other integrated functionality, Gigabit Ethernet controllers, two USB 2.0 controllers, a security engine, a 32-bit DDR2 and DDR3 memory controller with ECC support, dual four-channel DMA controllers, a SD/MMC host controller and high speed interfaces which can be configured as SerDes lanes, PCIe and SGMII interfaces. The chip is packaged in 689-pin packages which are pin compatible with the P2 family processors.
- P1011 – Includes one 800 MHz e500 core, 256 kB L2 cache, four SerDes lanes, three Gbit Ethernet controllers and a TDM engine for legacy phone applications.
- P1020 – includes two 800 MHz e500 cores, 256 kB shared L2 cache, four SerDes lanes, three Gbit Ethernet controllers and a TDM engine.
- Freescale announces pin-compatible, power-efficient series in new QorIQ communications platforms – Freescale.com
- P1 Series Single- and Dual-Core Communications Processors – Freescale.com
P2
The P2 series is designed for a wide variety of applications in the networking, telecom, military and industrial markets. It will be available in special high quality parts, with junction tolerances from -40 to 125 °C, especially suited for demanding out doors environments. It is the mid-level platform, with devices ranging from 800 MHz up to 1.2 GHz. It is designed to replace the PowerQUICC II Pro and PowerQUICC III platforms. The chips include, among other integrated functionality, a 512 kB L2 cache, a security engine, three Gigabit Ethernet controllers, a USB 2.0 controller, a 64-bit DDR2 and DDR3 memory controller with ECC support, dual four-channel DMA controllers, a SD/MMC host controller and high speed SerDes lanes which can be configured as three PCIe interfaces, two RapidIO interfaces and two SGMII interfaces. The chips are packaged in 689-pin packages which are pin compatible with the P1 family processors.
- P2010 – Includes one 1.2 GHz core
- P2020 – Includes two 1.2 GHz cores, with shared L2 cache
- Freescale announces pin-compatible, power-efficient series in new QorIQ communications platforms – Freescale.com
- P2 Series Single- and dual-core communications processors – Freescale.com
P3
The details of QorIQ P3 series is yet to be announced but is designed to ease the transition to a many-core platform utilizing the CoreNet coherency fabric.
P4
The P4 series is a high performance networking platform, designed for backbone networking and enterprise level switching and routing. The P4 family offers an extreme multi-core platform, with support for up to eight Power Architecture e500mc cores at frequencies up to 1.5 GHz on the same chip, connected by the FlexNet coherency fabric. The chips include among other integrated functionality, integrated L3 caches, memory controllers, multiple I/O-devices such as DUART, GPIO and USB 2.0, security and encryption engines, a queue manager scheduling on-chip events and a SerDes based on-chip high speed network configurable as multiple Gigabit Ethernet, 10 Gigabit Ethernet, RapidIO or PCIe interfaces.
The cores are supported by a hardware hypervisor and can be run in symmetric or asymmetric mode meaning that the cores can run and boot operating systems together or separately, restering and partitioning cores and datapaths independently without disturbing other operating systems and applications.
- P4080 – Includes eight e500 cores, each with 32/32 instruction/data L1 caches and a 128 kB L2 cache. The chip has dual 1 MB L3 caches, each connected to a 64-bit DDR2/DDR3 memory controller. The chip contains a security and encryption module, capable of packet parsing and classification, and acceleration of encryption and regexp pattern matching. The chip can be configured with up to eight Gigabit and two 10 Gigabit Ethernet controllers, three 5 GHz PCIe ports and two RapidIO interfaces. It also has various other peripheral connectivity such as two USB2 controllers. It is designed to operate below 30 W at 1.5 GHz. The processor is manufacured on a 45 nm SOI process and begun sampling to customers in August 2009.[1]
- Eight-core microprocessor from Freescale redefines state-of-the-art for embedded multicore processing – Freescale.com
- P4 Series P4080 multicore processor – Freescale.com
To help software developers and system designers get started with the QorIQ P4080, Freescale worked with Virtutech to create a virtual platform for the P4080 that can be used prior to silicon availability to develop, test, and debug software for the chip. Currently, the simulator is only for the P4080, not the other chips announced in 2008[2].
P5
The details of QorIQ P5 series is yet to be announced but it's designed to be Freescale's highest performing processing platform.
See also
References
- ↑ http://media.freescale.com/phoenix.zhtml?c=196520&p=irol-newsArticle&ID=1324841&highlight=&tid=rsspr
- ↑ Virtutech page about P4080 simulation support
- Freescale QorIQ communications platforms signal a new way forward for embedded multicore technology - Freescale.com
- Freescale's QorIQ website
- QorIQ moves Power architecture to multicore – EDN.com
- MontaVista: multicore Linux support for Freescale QorIQ P4080 – EmbeddedControlEurope.com
- QorIQ 45-nm communications MPUs feature dual cores, low power – ElectronicProducts.com
- Virtutech Enables Multi-Core Development Ecosystem for Freescale Power Architecture QorIQ P4080 Processor – TradingMarkets.com
- MontaVista Provides First No-Cost Evaluation of Commercial Linux for Freescale QorIQ P4080 Multicore Processor – Money.AOL.com
- Halfhill, Tom R. (7 July 2008). "Freescale's Multicore Makeover". Microprocessor Report.