Application-specific instruction-set processor

ASIP is tailored to benefit a specific application. This specialization of the core provides a tradeoff between the flexibility of a general purpose CPU and the performance of an ASIC.

Some ASIPs have a configurable instruction set. Usually, these cores are divided into two parts: static logic which defines a minimum ISA and configurable logic which can be used to design new instructions. The configurable logic can be programmed either in the field in a similar fashion to an FPGA or during the chip synthesis.

Literature

• Oliver Schliebusch, Heinrich Meyr, Rainer Leupers, Optimized ASIP Synthesis from Architecture Description Language Models, Dordrecht, Springer, 2007, ISBN 978-1-4020-5685-7.
• Paolo Ienne, Rainer Leupers (eds.), Customizable Embedded Processors, San Mateo, CA, Morgan Kaufmann, 2006, ISBN 978-0-12-369526-0.
• Matthias Gries, Kurt Keutzer (eds.), Building ASIPs: The Mescal Methodology, New York, Springer, 2005, ISBN 978-0-387-26057-0.