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This is an old revision of this page, as edited by 104.228.101.152 (talk) at 17:24, 17 October 2020 (Execution model of instruction sets/u-archs: new section). The present address (URL) is a permanent link to this revision, which may differ significantly from the current revision.
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Thank you for creating this talk page. My name is Sean Halle, I have been curating the Execution Model page. My background is a PhD in Computer Science focused on Execution models for performance-portable parallel languages.

I look forward to discussion on the page. — Preceding unsigned comment added by Seanhalle (talkcontribs) 09:23, 28 March 2018 (UTC)[reply]

Execution model of instruction sets/u-archs

This article currently deals with (high-level) programming language execution models. But assembly languages (and machine code, the two being transformations) also have execution models. One might assume they're trivially serial and sequential, but microarchitectures have evolved to feature superscalar and out-of-order execution capabilities. I'm not clear on whether this changes the execution model(s) of assembly language(s), or whether it is more about a stack of execution models (potentially going all the way down to micro-operations.) 104.228.101.152 (talk) 17:24, 17 October 2020 (UTC)[reply]