Automatic Test Pattern Generation

Automatic Test Pattern Generation (ATPG) is a software technique for creating specialized test patterns for scan-based semiconductor devices. Software tools that employ ATPG may also employ software fault diagnostic algorithms for the purpose of narrowing down the area of search for a semiconductor device failure.^[1]

Notes

^ Crowell, G. "Using Scan Based Techniques for Fault Isolation in Logic Devices". Microelectronics Failure Analysis. pp. pp. 132-8. {{cite conference}}: |pages= has extra text (help); Unknown parameter |booktitle= ignored (|book-title= suggested) (help); Unknown parameter |coauthors= ignored (|author= suggested) (help)

References

Microelectronics Failure Analysis. Materials Park, Ohio: ASM International. 2004. ISBN 0-87170-804-3.

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[1] Crowell, G. "Using Scan Based Techniques for Fault Isolation in Logic Devices". Microelectronics Failure Analysis. pp. pp. 132-8. {{cite conference}}: |pages= has extra text (help); Unknown parameter |booktitle= ignored (|book-title= suggested) (help); Unknown parameter |coauthors= ignored (|author= suggested) (help)

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