CompactRISC
CompactRISC is a family of processor architectures from National Semiconductor. The architectures are designed according to RISC principles, and are mainly used in microcontrollers[1]. The subarchitectures of this family are the 16-bit CR16 and CR16C and the 32-bit CRX.
Features of CR16 family: compact implementations (less than 1 mm2 with 250nm), addressing of 2 MB (2^21), frequencies up to 66 MHz, hardware multiplier for 16-bit integers.[1]
It has complex instructions such as bit manipulation, saving/restoring and push/pop of several registers with single command.[1]
CR16 has 16 general purpose registers of 16 bits, and address registers of 21 bits wide. There are 8 special registers: program counter, interrupt stack pointer ISP, interrupt vector address register INTBASE, status register PSR, configuration register and 3 debug registers. Status register implements flags: C, T, L, F, Z, N, E, P, I.[1]
Instructions are encoded in two-address form in several formats, usually they have 16-bit encoding, but there are two formats for medium immediate instructions with length of 32-bit. Typical opcode length is 4 bits (bits 9-12 of most encoding types. Basic encoding formats are: Register-to-Register, Short 5-bit immediate value to Register, Medium immediate of 16-bit value to Register (32 bit encoding), Load/Store relative with short 5-bit displacement (2 bit opcode), Load/Store relative with medium 18-bit displacement (32 bit encoding, 2 bit opcode).[1]
CR16 implements traps and interrupts. Implementations of CR16 has three-stage pipeline: Fetch, Decode, Execute.[1]
References
External links
- National Semiconductor Embedded Microcontrollers (CR16 and COP8)
- CompactRISC Core Architecture page on National Semiconductor website (archived copy from 2007)
- CR16B Programmer’s Reference Manual, National Semiconductor, 1997
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