Jump to content

XAP processor

From Wikipedia, the free encyclopedia
This is an old revision of this page, as edited by Cbturner46 (talk | contribs) at 12:49, 7 September 2006 (Computation element for embedding within an Integrated Circuit). The present address (URL) is a permanent link to this revision, which may differ significantly from the current revision.
(diff) ← Previous revision | Latest revision (diff) | Newer revision → (diff)

A XAP processor provides the computation element within an Integrated Circuit that has to process digital data. A family of 16- and 32-bit XAP processors have been designed and implemented by Cambridge Consultants since 1993. The processor is embedded within an Application-Specific Integrated Circuit, ASIC, with other digital logic circuits and it will often also include some analogue input or output interfaces, i.e a mixed-signal ASIC. XAP processors target low power, low cost, high volume ASICs intended for applications such as Bluetooth, Zigbee, GPS, RFID, Near Field Communications and other wireless technologies. They are also very appropriate for ASICs in sensors or implantable devices like hearing aids.

The XAP processor is designed using the Verilog langauge and is provided as a so called 'soft IP core' where IP means Intellectual Property. ASIC engineers will often assemble their design using a set of such cores, or circuit components, licensed from IP providers, which means they do not have to design everything from scratch and can instead re-use cores that are already proved elsewhere.

Currently there are three XAP processors available; a 32-bit XAP3, a 16-bit XAP4 and a 16-bit XAP5 that can address up to 16 MB of memory. All XAP processors are supported with xIDE software development tools and SIF debug technology, which all assist designers to get their ASIC right first time.