Hilscher netx network controller

The netX network controller family, developed by Hilscher Gesellschaft für Systemautomation mbH, is a solution for implementing all proven Fieldbus and Real-Time Ethernet systems.

The Hilscher netX family

Controller	netX 10	netx 52	netx 51	netx 100	netx 500
CPU models	ARM 966/xPIC	ARM 966/xPIC	ARM 966/xPIC	ARM 926 + MMU/-	ARM 926 + MMU/-
CPU clock	100 MHz	100 MHz	100 MHz	200 MHz	200 MHz
RAM / ROM	396kB/64kB	672kB/64kB	672kB/64kB	144kB/32kB	144kB/32kB
Host Interface Funktions	DPM/SPM/EXT/MEM	DPM/SPM/EXT/MEM	DPM/SPM/EXT/MEM	DPM/-/EXT	DPM/-/EXT
MemoryI/F Parallel/Serials	-/SQI XiP	-/SQI XiP	8, 16, 32 Bit/ SQI XiP	8, 16, 32 Bit/-	8, 16, 32 Bit/-
xC Channels	1	2	2	3	4
IEEE 1588 Sys Timer/EthernetPHY (10/100 mbps)	1/Single-PHY	2/Dual-PHY	2/Dual-PHY	1/Dual-PHY	1/Dual-PHY
I2C/SPI/UART	1/1/2	2/1/3	2/1/3	1/1/3	1/1/3
CAN/MAC/LCD	-/-/-	1/1/-	1/1/-	-/-/-	-/-/1
IO-Link Master Ports	4	4	8	-	-
ADC Channels	2*8	-	-	2*4	2*4
USB 1.1 Device/Host	D/-	D/-	D/-	D/H	D/H
WDC/Timer Counters	2/7	2/10	2/10	1/5	1/5
MMIO/GPIO/PIO	0/8/24	40/32/62	48/32/62	0/16/84	0/16/84
Package Size (mm)/Type (pins)	13*13/BGA(197)	15*15/BGA(244)	19*19/BGA(324)	22*22/BGA(345)	22*22/BGA(345)

MMIO = Multiplex Matrix IOs. The Multiplex Matrix is es set of PINs which could be configured freely with peripherial functions. Options are CAN, UART, SPI, I2C, GPIOs**, PIOs and SYNC Trigger.
- GPIOs = The GPIOs from Hilscher are able to generate Interupts, could count level or flags, or could be conected to timers to auto generate a PWM.