Template:Programmable logic

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This is an old revision of this page, as edited by Larry Doolittle (talk | contribs) at 06:41, 9 March 2016 (LatticeMico32 is open-source, LatticeMico8 is not). The present address (URL) is a permanent link to this revision, which may differ significantly from the current revision.

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v t e Programmable logic
Concepts	ASIC SOC FPGA Logic block CPLD EPLD PLA PAL GAL Reconfigurable computing Xputer Soft microprocessor Circuit underutilization
Languages	Verilog A AMS VHDL AMS VITAL SystemVerilog DPI SystemC AHDL Handel-C PSL UPF PALASM ABEL CUPL OpenVera C to HDL Flow to HDL MyHDL JHDL ELLA
Companies	Accellera Actel Achronix AMD Aldec Altera Atmel Cadence Cypress Duolog Forte Intel Lattice National Mentor Graphics Microsemi Signetics Synopsys Magma Virage Logic Texas Instruments Tabula Xilinx
Products	Template:Navbox subgroup

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