Talk:MOS Technology 6502/Archives/2012

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Two statements that really need expansion...

I have fond memories of the 6502, and I've always wondered about some of the magic that made it work. This article starts to mention this, and then slowly backs away again. For instance"

The internal logic runs at the same speed as the external clock rate, but despite the slow clock speeds (typically in the neighborhood of 1 to 2 MHz), the 6502's performance was actually competitive with other CPUs using significantly faster clocks. This is partly due to a simplistic state machine implemented by combinatorial (clockless) logic to a greater extent than in many other designs; the two phase clock (supplying two synchronizations per cycle) can thereby control the whole machine-cycle directly.

None of this explains the question being asked: why is the 6502 competitive with CPUs running at faster speeds? Why does a "simplistic state machine implemented by combinatorial (clockless) logic" make it go faster? Why does "the two phase clock"… allow …"control the whole machine-cycle directly"? And why does controlling "the whole machine-cycle" make it run faster?

"The low clock frequency moderated the speed requirement of memory and peripherals attached to the CPU, as only about 50% of the clock cycle was available for memory access (due to the asynchronous design, this percentage varied strongly among chip versions)."

Again, this statement leaves me scratching my head. Why does asynchronous design mean it only uses 50% of the clock cycle? Why does that moderate the speed of the memory? How does that make it run faster? Does it?

"This was critical at a time when affordable memory had access times in the range 450-250ns"

What is critical here? Why does not looking at memory make it affordable?

I'm hoping someone can help clear this up!

Maury Markowitz (talk) 00:02, 25 August 2011 (UTC)

The original Intel 8080 used a 2 MHz clock verses the 1 MHz clock for the 6800 and 6502. However the 8080 typically used twice as many clock cycles to do the same function. The 8080 move memory to register instruction took 7 clock cycles while the 6502 load accumulator instruction took only 4 cycles. Each instruction set had advantages and disadvantages. You could write benchmark programs that would prove that any one of these microprocessors was the fastest. (It has been a long time since I compared instruction sets and I had to break out my data sheets to come up with this example.) A 2MHz 8080 and a 1MHz 6800/6502 used the same speed memory. -- SWTPC6800 (talk) 22:52, 19 September 2011 (UTC)

A Microprocessor for the Revolution: The 6809. By Terry Ritter and Joel Boney. Motorola Inc. Byte Magazine March 1979. Page 46

Other processors use an internal state machine to implement the required internal operations. These processors frequently require multiple states and multiple clock edges to implement operations which are done in one cycle on 6800 class processors.
The 6800 class machines are all random logic machines with multiple dynamic sequencers. This method of microprocessor design selects a different set of engineering trade-offs as opposed to the state machine approach. In particular, less critical timing is necessary, but suspending the processor for a long time is difficult.

-- SWTPC6800 (talk) 19:38, 11 March 2012 (UTC)

Motorola Lawsuit and 6501?

The description of the Motorola lawsuit around the 6501 implies (if not directly states) that the 6501 was developed first, with the 6502 being a response to that lawsuit, i.e. that it was "lawsuit-compatible," which was followed by the WESCON showing. However, Bagnall's book clearly states that the 6501 and 6502 were developed simultaneously, with the layout engineers having a bet about which would be more successful. Also, both were announced at WESCON; even the print ad on this page clearly shows both microprocessors. The lawsuit only happened a month after the show. (I see that this is supported by a comment above.) Should this be fixed? MVives (talk) 06:37, 19 January 2012 (UTC)

I redid the History and Use section and fixed the 6501 issues. -- SWTPC6800 (talk) 03:25, 4 June 2012 (UTC)

removed comments

Saved here instead: the following link to be moved to the upcoming CMD SuperCPU article:

• "Underneath the Hood of the SuperCPU" – By Jim Brain, in C=Hacking, Issue #12, Version 1.3, March 1996 (search for "@(#)cmdcpu")

• link no longer valid: -->
• Free-6502, a VHDL implementation of the 6502
• links commented out due to irrelevance (6502 only barely mentioned):
• History of 6502 – Used by the digital group.
• DigiBarn Systems Reference – To the digital group's systems

I added "Category:Microcontrollers" because the article says it is still used as an embedded controller ... and I seem to remember hearing that it was originally designed as a peripheral controller (or am I confusing it with a different microcontroller ?) --Anonymous I removed the µC cat because that cat applies to the 6510 more than to the 6502 (which does not even have output ports besides the basic data out lines. --Wernher Widefox (talk) 10:17, 29 June 2012 (UTC)