Repeat-accumulate code

In computer science, repeat-accumulate codes (RA codes) are a low complexity class of error-correcting codes. They were devised so that their ensemble weight distributions are easy to derive. RA codes were introduced by Divsalar et al.

In an RA code, an information block of length ${N}$ is repeated ${q}$ times, scrambled by an interleaver of size ${qN}$, and then encoded by a rate 1 accumulator. The accumulator can be viewed as a truncated rate 1 recursive convolutional encoder with transfer function ${1/(1+D)}$, but Divsalar et al. prefer to think of it as a block code whose input block ${(z_{1},\ldots ,z_{n})}$ and output block ${(x_{1},\ldots ,x_{n})}$ are related by the formula ${x_{1}=z_{1}}$ and $x_{i}=x_{i-1}+z_{i}$ for $i>1$. The encoding time for RA codes is linear and their rate is $1/q$. They are nonsystematic.

Irregular Repeat Accumulate Codes

Irregular Repeat Accumulate (IRA) Codes are a derivative form of repeat accumulate (RA) codes where the repetition performed in the input bits is not the same for all bits.

Systematic IRA code are considered a form of LDPC codes. The claim that the DVB-S2 standard implements an LDPC code that is a form of an IRA code is currently under litigation. US patents 7,116,710; 7,421,032; 7,916,781; and 8,284,833 are at issue.

References

• D. Divsalar, H. Jin, and R. J. McEliece. "Coding theorems for ‘turbo-like’ codes." Proc. 36th Allerton Conf. on Communication, Control and Computing, Allerton, Illinois, Sept. 1998, pp. 201–210.

External links

• Iterative Error Correction: Turbo, Low-Density Parity-Check, and Repeat-Accumulate Codes