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Physical coding sublayer

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The Physical Coding Sublayer (PCS) is a networking protocol sublayer in the Fast Ethernet, gigabit Ethernet, and 10 Gigabit Ethernet standards. It resides at the top of the physical layer (PHY), and provides an interface between the Physical Medium Attachment (PMA) sublayer and the Media Independent Interface (MII). It is responsible for data encoding/decoding, scrambling/descrambling, alignment marker insertion/removal, block and symbol redistribution, and lane block synchronization and deskew.[1]

Description

The Ethernet PCS sublayer is at the top of the Ethernet physical layer (PHY). The hierarchy is as follows:

  • Data Link Layer (Layer 2)
  • PHY Layer (Layer 1)
    • PCS (Physical Coding Sublayer) - This sublayer determines when a functional link has been established, provides rate difference compensation, and performs coding such as 64b/66b encoding and scrambling/descrambling
    • PMA (Physical Medium Attachment Sublayer) - This sublayer performs PMA framing, octet synchronization/detection, and scrambling/descrambling
    • PMD (Physical Medium Dependent Sublayer) - This sublayer consists of a transceiver for the physical medium

Physical Coding Sublayer (PCS) specifications

10 Gigabit Ethernet

  • 10GBASE-R (LAN) is the serial encoded PCS that allows for Ethernet framing at a rate of approximately 10.3 Gbit/s (MAC = 10,000 Gbit/s, overhead = 64 B/66 B effective rate = 10,000 * 66/64 = 10,312.5 - see also 64b/66b encoding). This rate does not match the rate 9.953 Gbit/s used in SONET and SDH and is not supported over a WAN based on SONET or SDH.
  • 10GBASE-X (LAN) uses similar coding methods as 10GBASE-R but is only used in the definition of 10GBASE-LX4. This is mainly because LX4 operates on both single and multimode fibers, giving it a unique set of specifications as defined in its PMD.
  • 10GBASE-W (WAN) defines WAN encoding for 10GbE, it encodes the frames so that they are compatible with SONET STS-192c data rates and SDH VC-4-64 transmission standards allowing for 10 Gbit/s transmission across a WAN. It does this by wrapping the 64/66b payload into a SONET frame, making the effective rate 9.95 Gbit/s.

Lattice Semiconductor multi-protocol

"PCS logic can be configured to support numerous industry-standard, high-speed serial data transfer protocols."[2]

References

  1. ^ Spurgeon, Charles (2014). Ethernet: The Definitive Guide. O'Reilly. p. 198.
  2. ^ "LatticeECP3 SERDES/PCS Usage Guide" (PDF). Lattice semiconductor Corporation: p 8–1. Retrieved 2014-09-03. {{cite journal}}: |pages= has extra text (help)
  • Barbieri, Alessandro. "10 GbE and Its X Factors" (PDF). Packet: Cisco Systems Users Magazine. 17 (3): 25–28. Retrieved 2007-12-31.