Talk:Single instruction, multiple threads
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Does 'SIMT' Include Latency-Hiding?
Should we consider 'SIMT' to include the latency-hiding strategy used by its current-day implementations, whereby different warps can be switched between with zero overhead?
One could construct a SIMT architecture which did not have this scheduling strategy, after all (as, say, an extension to an ordinary CPU architecture), but this scheduling strategy is central to the way SIMT is used today.
For now, I've assumed it is to be included in 'SIMT', and have made this change accordingly: 28 August 2014.