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AMD Eyefinity

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Multi-monitor setups are common with stockbrokers in financial market making.
Playing a racing video game on Single Large Surface (SLS) with a 5x1 portrait display group configuration at ExtravaLANza 2012 in Toronto.

AMD Eyefinity is the brand name of AMD's on-die multi-monitor-display controllers which support to drive at least three and up to six simultaneous displays off of a single graphics card.[1] AMD Eyefinity was introduced with the Radeon HD 5000 Series in September 2009. AMD Eyefinity is available on more than 45 consumer as well as AMD FirePro professional-grade products.[2]

All AMD GPUs newer the the Evergreen support maximum of 2 non-DisplayPort displays and a maximum of 6 DisplayPort displays.[3]

There is the additional possibility to connect multiple computers over Gigabit Ethernet or Ethernet to drive a large video wall.[4]

Overview

The 5000-series designs host two internal clocks and one external clock. Displays connected over VGA, DVI, or HDMI each require their own internal clock. But all displays connected over DisplayPort can be driven from only one external clock. This external clock is what allows Eyefinity to fuel up to six monitors from a single card.

The entire HD 5000 series products have Eyefinity capabilities supporting three outputs. The Radeon HD 5870 Eyefinity Edition, however, supports six mini DisplayPort outputs, all of which can be simultaneously active.[5]

The display controller has two RAMDACs which are used to drive the VGA or the DVI ports in analog mode (for example, when a DVI-to-VGA converter is attached to a DVI port), a maximum of six digital transmitters that can output either a DisplayPort signal or a TMDS signal which is used for either DVI or HDMI, and two clock signal generators needed to drive the digital outputs in TMDS mode. Dual-link DVI displays use two of the TMDS/DisplayPort transmitters and one clock signal each. Single-link DVI displays and HDMI displays use one TMDS/DisplayPort transmitter and one clock signal each. DisplayPort displays use one TMDS/DisplayPort transmitter and no clock signal.

An active DisplayPort adapter can be used to convert a DisplayPort signal to another type of signal like VGA, single-link DVI or dual-link DVI, or HDMI if more than two non-DisplayPort displays need to be connected to a Radeon HD 5000 series graphics card.[5]

DisplayPort 1.2 added the possibility to drive multiple displays on single DisplayPort connector, called Multi-Stream Transport (MST). AMD graphics solutions equipped with DisplayPort 1.2 outputs can run multiple monitors from a single port.

Availability

Main articles: List of Radeon graphics cards and List of AMD APUs
Maximum output configurations for the on-die display controller of Radeon Series
Unified Video Decoder — — — — UVD, UVD+, UDV 2 UVD 2.2 UVD 3 UVD 4 UVD 4.2 TBA
Video Codec Engine — — — — — — — VCE 1.0 VCE 2.0 TBA
TrueAudio — — — — — — — — Some TBA
Max. № of displays 1–2 2 2 2 2 2–6 4–6 2–6 2–6 TBA
R100 R200 R300
R400		 R500 R600
R650
R700		 Evergreen Northern Islands Southern Islands
Sea Islands		 Volcanic Islands Pirates Islands
Released Apr 2000 Aug 2001 Oct 2002 Oct 2005 May 2006 Sep 2009 Oct 2010 Jan 2012 Sept 2013 TBA
Linux KMS driver[6] Yes Yes Yes Yes Yes Yes Yes Yes Yes —
FYI Fixed pipeline Unified shader model
various TeraScale Graphics Core Next (Mantle) TBA

All AMD GPUs starting with the Evergreen series support a maximum of 2 non-DisplayPort displays and a maximum of 6 DisplayPort displays.[3] AMD Eyefinity is also available in AMDs APU branded product line, as this Civilization V running in 3x1 portrait mode multi-monitor on a Eyefinity-enabled AMD A10-7850K "Kaveri" proves. The A10-7850K is said up to four displays.[7]

Feature overview for AMD APUs

The following table shows features of AMD's processors with 3D graphics, including APUs (see also: List of AMD processors with 3D graphics).

[ VisualEditor ]
Platform High, standard and low power Low and ultra-low power
Codename Server Basic Toronto
Micro Kyoto
Desktop Performance Raphael Phoenix
Mainstream Llano Trinity Richland Kaveri Kaveri Refresh (Godavari) Carrizo Bristol Ridge Raven Ridge Picasso Renoir Cezanne
Entry
Basic Kabini Dalí
Mobile Performance Renoir Cezanne Rembrandt Dragon Range
Mainstream Llano Trinity Richland Kaveri Carrizo Bristol Ridge Raven Ridge Picasso Renoir
Lucienne 		Cezanne
Barceló 		Phoenix
Entry Dalí Mendocino
Basic Desna, Ontario, Zacate Kabini, Temash Beema, Mullins Carrizo-L Stoney Ridge Pollock
Embedded Trinity Bald Eagle Merlin Falcon,
Brown Falcon 		Great Horned Owl Grey Hawk Ontario, Zacate Kabini Steppe Eagle, Crowned Eagle,
LX-Family 		Prairie Falcon Banded Kestrel River Hawk
Released Aug 2011 Oct 2012 Jun 2013 Jan 2014 2015 Jun 2015 Jun 2016 Oct 2017 Jan 2019 Mar 2020 Jan 2021 Jan 2022 Sep 2022 Jan 2023 Jan 2011 May 2013 Apr 2014 May 2015 Feb 2016 Apr 2019 Jul 2020 Jun 2022 Nov 2022
CPU microarchitecture K10 Piledriver Steamroller Excavator "Excavator+"[8] Zen Zen+ Zen 2 Zen 3 Zen 3+ Zen 4 Bobcat Jaguar Puma Puma+[9] "Excavator+" Zen Zen+ "Zen 2+"
ISA x86-64 v1 x86-64 v2 x86-64 v3 x86-64 v4 x86-64 v1 x86-64 v2 x86-64 v3
Socket Desktop Performance — AM5 — —
Mainstream — AM4 — —
Entry FM1 FM2 FM2+ FM2+[a], AM4 AM4 —
Basic — — AM1 — FP5 —
Other FS1 FS1+, FP2 FP3 FP4 FP5 FP6 FP7 FL1 FP7
FP7r2
FP8 		FT1 FT3 FT3b FP4 FP5 FT5 FP5 FT6
PCI Express version 2.0 3.0 4.0 5.0 4.0 2.0 3.0
CXL — —
Fab. (nm) GF 32SHP
(HKMG SOI) 		GF 28SHP
(HKMG bulk) 		GF 14LPP
(FinFET bulk) 		GF 12LP
(FinFET bulk) 		TSMC N7
(FinFET bulk) 		TSMC N6
(FinFET bulk) 		CCD: TSMC N5
(FinFET bulk)
cIOD: TSMC N6
(FinFET bulk) 		TSMC 4nm
(FinFET bulk) 		TSMC N40
(bulk) 		TSMC N28
(HKMG bulk) 		GF 28SHP
(HKMG bulk) 		GF 14LPP
(FinFET bulk) 		GF 12LP
(FinFET bulk) 		TSMC N6
(FinFET bulk)
Die area (mm2) 228 246 245 245 250 210[10] 156 180 210 CCD: (2x) 70
cIOD: 122 		178 75 (+ 28 FCH) 107 ? 125 149 ~100
Min TDP (W) 35 17 12 10 15 65 35 4.5 4 3.95 10 6 12 8
Max APU TDP (W) 100 95 65 45 170 54 18 25 6 54 15
Max stock APU base clock (GHz) 3 3.8 4.1 4.1 3.7 3.8 3.6 3.7 3.8 4.0 3.3 4.7 4.3 1.75 2.2 2 2.2 3.2 2.6 1.2 3.35 2.8
Max APUs per node[b] 1 1
Max core dies per CPU 1 2 1 1
Max CCX per core die 1 2 1 1
Max cores per CCX 4 8 2 4 2 4
Max CPU[c] cores per APU 4 8 16 8 2 4 2 4
Max threads per CPU core 1 2 1 2
Integer pipeline structure 3+3 2+2 4+2 4+2+1 1+3+3+1+2 1+1+1+1 2+2 4+2 4+2+1
i386, i486, i586, CMOV, NOPL, i686, PAE, NX bit, CMPXCHG16B, AMD-V, RVI, ABM, and 64-bit LAHF/SAHF Yes Yes
IOMMU[d] — v2 v1 v2
BMI1, AES-NI, CLMUL, and F16C Yes — Yes
MOVBE — Yes
AVIC, BMI2, RDRAND, and MWAITX/MONITORX — Yes
SME[e], TSME[e], ADX, SHA, RDSEED, SMAP, SMEP, XSAVEC, XSAVES, XRSTORS, CLFLUSHOPT, CLZERO, and PTE Coalescing — Yes — Yes
GMET, WBNOINVD, CLWB, QOS, PQE-BW, RDPID, RDPRU, and MCOMMIT — Yes — Yes
MPK, VAES — Yes —
SGX — —
FPUs per core 1 0.5 1 1 0.5 1
Pipes per FPU 2 2
FPU pipe width 128-bit 256-bit 80-bit 128-bit 256-bit
CPU instruction set SIMD level SSE4a[f] AVX AVX2 AVX-512 SSSE3 AVX AVX2
3DNow! 3DNow!+ — —
PREFETCH/PREFETCHW Yes Yes
GFNI — Yes —
AMX —
FMA4, LWP, TBM, and XOP — Yes — — Yes —
FMA3 Yes Yes
AMD XDNA — Yes —
L1 data cache per core (KiB) 64 16 32 32
L1 data cache associativity (ways) 2 4 8 8
L1 instruction caches per core 1 0.5 1 1 0.5 1
Max APU total L1 instruction cache (KiB) 256 128 192 256 512 256 64 128 96 128
L1 instruction cache associativity (ways) 2 3 4 8 2 3 4 8
L2 caches per core 1 0.5 1 1 0.5 1
Max APU total L2 cache (MiB) 4 2 4 16 1 2 1 2
L2 cache associativity (ways) 16 8 16 8
Max on-die L3 cache per CCX (MiB) — 4 16 32 — 4
Max 3D V-Cache per CCD (MiB) — 64 — —
Max total in-CCD L3 cache per APU (MiB) 4 8 16 64 4
Max. total 3D V-Cache per APU (MiB) — 64 — —
Max. board L3 cache per APU (MiB) — —
Max total L3 cache per APU (MiB) 4 8 16 128 4
APU L3 cache associativity (ways) 16 16
L3 cache scheme Victim Victim
Max. L4 cache — —
Max stock DRAM support DDR3-1866 DDR3-2133 DDR3-2133, DDR4-2400 DDR4-2400 DDR4-2933 DDR4-3200, LPDDR4-4266 DDR5-4800, LPDDR5-6400 DDR5-5200 DDR5-5600, LPDDR5x-7500 DDR3L-1333 DDR3L-1600 DDR3L-1866 DDR3-1866, DDR4-2400 DDR4-2400 DDR4-1600 DDR4-3200 LPDDR5-5500
Max DRAM channels per APU 2 1 2 1 2
Max stock DRAM bandwidth (GB/s) per APU 29.866 34.132 38.400 46.932 68.256 102.400 83.200 120.000 10.666 12.800 14.933 19.200 38.400 12.800 51.200 88.000
GPU microarchitecture TeraScale 2 (VLIW5) TeraScale 3 (VLIW4) GCN 2nd gen GCN 3rd gen GCN 5th gen[11] RDNA 2 RDNA 3 TeraScale 2 (VLIW5) GCN 2nd gen GCN 3rd gen[11] GCN 5th gen RDNA 2
GPU instruction set TeraScale instruction set GCN instruction set RDNA instruction set TeraScale instruction set GCN instruction set RDNA instruction set
Max stock GPU base clock (MHz) 600 800 844 866 1108 1250 1400 2100 2400 400 538 600 ? 847 900 1200 600 1300 1900
Max stock GPU base GFLOPS[g] 480 614.4 648.1 886.7 1134.5 1760 1971.2 2150.4 3686.4 102.4 86 ? ? ? 345.6 460.8 230.4 1331.2 486.4
3D engine[h] Up to 400:20:8 Up to 384:24:6 Up to 512:32:8 Up to 704:44:16[12] Up to 512:32:8 768:48:8 128:8:4 80:8:4 128:8:4 Up to 192:12:8 Up to 192:12:4 192:12:4 Up to 512:?:? 128:?:?
IOMMUv1 IOMMUv2 IOMMUv1 ? IOMMUv2
Video decoder UVD 3.0 UVD 4.2 UVD 6.0 VCN 1.0[13] VCN 2.1[14] VCN 2.2[14] VCN 3.1 ? UVD 3.0 UVD 4.0 UVD 4.2 UVD 6.2 VCN 1.0 VCN 3.1
Video encoder — VCE 1.0 VCE 2.0 VCE 3.1 — VCE 2.0 VCE 3.4
AMD Fluid Motion No Yes No No Yes No
GPU power saving PowerPlay PowerTune PowerPlay PowerTune[15]
TrueAudio — Yes[16] ? — Yes
FreeSync 1
2 		1
2
HDCP[i] ? 1.4 2.2 2.3 ? 1.4 2.2 2.3
PlayReady[i] — 3.0 not yet — 3.0 not yet
Supported displays[j] 2–3 2–4 3 3 (desktop)
4 (mobile, embedded)		 4 2 3 4 4
/drm/radeon[k][18][3] Yes — Yes —
/drm/amdgpu[k][19] — Yes[20] — Yes[20]
  1. ^ For FM2+ Excavator models: A8-7680, A6-7480 & Athlon X4 845.
  2. ^ A PC would be one node.
  3. ^ An APU combines a CPU and a GPU. Both have cores.
  4. ^ Requires firmware support.
  5. ^ a b Requires firmware support.
  6. ^ No SSE4. No SSSE3.
  7. ^ Single-precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.
  8. ^ Unified shaders : texture mapping units : render output units
  9. ^ a b To play protected video content, it also requires card, operating system, driver, and application support. A compatible HDCP display is also needed for this. HDCP is mandatory for the output of certain audio formats, placing additional constraints on the multimedia setup.
  10. ^ To feed more than two displays, the additional panels must have native DisplayPort support.[17] Alternatively active DisplayPort-to-DVI/HDMI/VGA adapters can be employed.
  11. ^ a b DRM (Direct Rendering Manager) is a component of the Linux kernel. Support in this table refers to the most current version.

Software support

AMD Catalyst supports Eyefinity and enables the user to independently configure and run each attached displays. It facilitates the configuration of "cloned mode", i.e. to copy one desktop onto multiple screens or "extended mode", i.e. to span the workspace across multiple screens and combine the resolutions of all of those displays into one big resolution. AMD calls the extended modes Single Large Surface (SLS) and Catalyst support of certain range of display group configurations. For example 5x1 landscape and 5x1 portrait are supported since AMD Catalyst version 11.10 from October 2011.[2][21]

Starting in Catalyst 14.6 AMD has enabled mixed resolution support, allowing for a single Eyefinity display group to be created while each monitor runs at a different resolution. This feature is made possible through the addition of two new Eyefinity display modes, Fit and Expand, which join the traditional Fill mode. In both Fit an Expand mode AMD is compensating for the mismatched resolutions by creating a virtual desktop that is of a different resolution than the monitors, and then either padding it out or cropping it as is necessary.[22]

AMD validated some video games to support Eyefinity. The short list include titles such as Age of Conan, ARMA 2: Operation Arrowhead, S.T.A.L.K.E.R.: Call of Pripyat, Serious Sam 3: BFE, Singularity (video game), Sleeping Dogs, Assassin's Creed II, Sniper Elite V2, Soldier of Fortune Online, Tom Clancy's Splinter Cell: Conviction, Star Wars: The Force Unleashed 2, Marvel Super Hero Squad Online, R.U.S.E., Supreme Commander 2 among others.[23] However, game not on this short list seem to work as well, e.g. Dirt 3 and The Elder Scrolls V: Skyrim.

See also

Wikimedia Commons has media related to AMD Eyefinity.

References

  1. ^ "AMD's Radeon HD 5870 Eyefinity 6 Edition Reviewed". AnandTech. 2010-03-31. Retrieved 2014-07-02.
  2. ^ a b "AMD Eyefinity: FAQ". AMD. 2011-05-17. Retrieved 2014-07-02.
  3. ^ a b c "Radeon feature matrix". freedesktop.org. Cite error: The named reference "Radeon Feature Matrix" was defined multiple times with different content (see the help page).
  4. ^ "Configuring and Running a Large Video Wall using ATI FirePro Graphics" (pdf). Retrieved 2014-07-04.
  5. ^ a b "AMD Eyefinity on AMD Radeon HD 5870". Tom's Hardware. 2009-09-23. Retrieved 2014-07-02.
  6. ^ Airlie, David (2009-11-26). "DisplayPort supported by KMS driver mainlined into Linux kernel 2.6.33". Retrieved 2014-07-02.
  7. ^ "Multi-monitor: Civilization V on A10-7850K "Kaveri"".
  8. ^ "AMD Announces the 7th Generation APU: Excavator mk2 in Bristol Ridge and Stoney Ridge for Notebooks". 31 May 2016. Retrieved 3 January 2020.
  9. ^ "AMD Mobile "Carrizo" Family of APUs Designed to Deliver Significant Leap in Performance, Energy Efficiency in 2015" (Press release). 20 November 2014. Retrieved 16 February 2015.
  10. ^ "The Mobile CPU Comparison Guide Rev. 13.0 Page 5 : AMD Mobile CPU Full List". TechARP.com. Retrieved 13 December 2017.
  11. ^ a b "AMD VEGA10 and VEGA11 GPUs spotted in OpenCL driver". VideoCardz.com. Retrieved 6 June 2017.
  12. ^ Cutress, Ian (1 February 2018). "Zen Cores and Vega: Ryzen APUs for AM4 – AMD Tech Day at CES: 2018 Roadmap Revealed, with Ryzen APUs, Zen+ on 12nm, Vega on 7nm". Anandtech. Retrieved 7 February 2018.
  13. ^ Larabel, Michael (17 November 2017). "Radeon VCN Encode Support Lands in Mesa 17.4 Git". Phoronix. Retrieved 20 November 2017.
  14. ^ a b "AMD Ryzen 5000G 'Cezanne' APU Gets First High-Res Die Shots, 10.7 Billion Transistors In A 180mm2 Package". wccftech. Aug 12, 2021. Retrieved August 25, 2021.
  15. ^ Tony Chen; Jason Greaves, "AMD's Graphics Core Next (GCN) Architecture" (PDF), AMD, retrieved 13 August 2016
  16. ^ "A technical look at AMD's Kaveri architecture". Semi Accurate. Retrieved 6 July 2014.
  17. ^ "How do I connect three or More Monitors to an AMD Radeon™ HD 5000, HD 6000, and HD 7000 Series Graphics Card?". AMD. Retrieved 8 December 2014.
  18. ^ Airlie, David (26 November 2009). "DisplayPort supported by KMS driver mainlined into Linux kernel 2.6.33". Retrieved 16 January 2016.
  19. ^ Deucher, Alexander (16 September 2015). "XDC2015: AMDGPU" (PDF). Retrieved 16 January 2016.
  20. ^ a b Michel Dänzer (17 November 2016). "[ANNOUNCE] xf86-video-amdgpu 1.2.0". lists.x.org.
  21. ^ "AMD's Eyefinity Technology Explained". Tom's Hardware. 2010-02-28. Retrieved 2014-07-02.
  22. ^ "AMD Catalyst 14.6 beta adds new Eyefinity functionality". AnandTech. 2014-05-27. Retrieved 2014-07-02.
  23. ^ "AMD Eyefinity Validated and Ready Software".
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