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Adapteva, Inc
IndustrySemiconductor industry
FoundedMarch, 2008
FounderAndreas Olofsson
Headquarters
Lexington, Massachusetts
,
USA
Key people
Andreas Olofsson, CEO
ProductsCentral processing units
OwnerPrivately funded
Websiteadapteva.com

Adapteva is a fabless semiconductor company focusing on low power multi-core microprocessor design. The company was the first company to announce a design with 1000 general-purpose microprocessors on a single chip.[1] The company name is a combination of "adapt" and the Hebrew word "Teva" meaning nature. The name is a reflection of the company's key technology and business philosophy.

History

Adapteva was founded in March 2008 by Andreas Olofsson. The company was founded with the goal of bringing a 10x advancement in floating point processing energy efficiency for the mobile device market. In May 2009, Mr. Olofsson had taped out the first prototype based on a new type massively parallel multi-core architecture. The initial prototype was implemented in 65 nm and had 16 independent microprocessor cores. The initial prototypes enabled Adapteva to secure $1.5M in Series-A funding from BittWare, a company from Concord, New Hampshire, in October 2009.[2]

Adapteva's first commercial chip product started sampling to customers in early May 2011 and they soon thereafter announced the capability to put up to 4,096 cores on a single chip.

The current version, Epiphany IV, was announced in October 2011 and has been taped-out at 28 nm with 64-cores and was said to be generally available in January 2012, but isn't as of February 2014.

Products

Adapteva's main product family is the Epiphany scalable multi-core MIMD architecture. The Epiphany architecture consists of up to 4,096 RISC microprocessors, all sharing a single flat memory space. Each RISC processor in the Epiphany architecture is superscalar floating point microprocessor operating up to 1 GHz and capable of 2 GFLOPS (single precision). Epiphany's RISC processors use a custom instruction set architecture (ISA) optimised for floating point,[3] but are programmable in high level ANSI C using a standard GNU-GCC tool chain. Each RISC processor has 32 KB of local memory that can be accessed by the local processor or through any other processor within the memory space. The memory architecture is unusual in that it doesn't employ explicit hierarchy or hardware caches. The flat and unobstructed memory hierarchy allows cores to communicate with each other efficiently, reducing overhead in core-to-core communication. All processor nodes are connected through a Network On Chip.[4]

Epiphany multi-core coprocessors

As of August 19, 2012 Adapteva posted some specifications and information about Epiphany multi-core coprocessors.[5]

Technical info for    E16G301[6]   E64G401[7]
Cores 16 64
Core MHz 1000 800
Core GFLOPS/s 2 1.6
"Sum GHz" 16 51.2
Sum GFLOPS 32 102
mm² 8.96 8.2
nm 65 28
W Def. 0.9 1.4
W Max 2 2

As of September 2012, a 16-core version, the Epiphany-III (E16G301), was produced using 65 nm[8] (11.5 mm2, 500 MHz chip[9]) and engineering samples of 64-core Epiphany-IV (E64G401) were produced using 28 nm GlobalFoundries process (800 MHz).[10]

The primary markets for the Epiphany multi-core architecture include:

Parallella project

In September 2012, Adapteva started project Parallella on Kickstarter, which is marketed as "Supercomputer for everyone." Architecture reference manuals for the platform were published as part of the campaign to attract attention to the project.[11] The $750,000 funding goal was reached in a month, with a minimum contribution of $99 entitling backers to obtain one device; although the initial deadline was set for May 2013, the first single-board computers with 16-core Epiphany chip were finally shipped in December 2013.[12]

FEATURES
Processor Dual-core ARM Cortex-A9 with NEON at 1 GHz (part of Zynq chip by Xilinx)
Coprocessor      16-core Epiphany Multi-core Accelerator (E16)
Performance 16 cores[13] with 800 MHz each, 25–26 GFLOPs (preliminary;[14] single precision[15]), 25 GIPS[16]
Memory 1 GB DDR3L RAM
USB 2x USB 2.0 (USB 2.0 HS and USB OTG)
Ethernet 10/100/1000
Display HDMI
Storage 16 GB microSD
Expansion Two 48-pin GPIO expansion headers
Power USB powered (2.5 W) or 5 V DC (~5 W)

Size of board is planned to be 3.4 × 2.1 inches (86 × 53 mm). [14] [17] [18]

The campaign successfully raised $898,921 via the Kickstarter campaign.[19][20] Raising $3 million goal was unsuccessful, so no 64-core version of Parallella will be mass-produced.[13] Kickstarter users having donated more than $750 will get "parallella-64" variant with 64-core coprocessor (made from initial prototype manufacturing with 50 chips yield per wafer).[21]

Joel Hruska from Extremetech says about this project: "Adapteva is drastically overselling what the Epiphany IV can actually deliver. 16–64 tiny cores with small amounts of memory, no local caches, and a relatively low clock speed can still be useful in certain workloads, but contributors aren’t buying a supercomputer — they’re buying the real-world equivalent of a self-sealing stem bolt."[22]

References

  1. ^ Clark, Don (2011-05-03). "Startup Has Big Plans for Tiny Chip Technology". Startup Has Big Plans for Tiny Chip Technology. Wall Street Journal. Retrieved 2011-05-03.
  2. ^ "From RTL to GDSII in Just Six Weeks". From RTL to GDSII in Just Six Weeks. EETimes. 2010. Retrieved 2010-10-26.
  3. ^ "Epiphany Architecture Reference Manual".
  4. ^ "Startup Launches Manycore Floating Point Acceleration Technology". Startup Launches Manycore Floating Point Acceleration Technology. HPCWire. 2011. Retrieved 2011-05-03.
  5. ^ "Epiphany Multicore IP. Example Configurations" // admin(2012-08-19)
  6. ^ Epiphany-III 16-core 65nm Microprocessor (E16G301) // admin (2012-08-19)
  7. ^ Epiphany-IV 64-core 28nm Microprocessor (E64G401) // admin (2012-08-19)
  8. ^ Silicon devices // Adapteva
  9. ^ Linley Gwennap, Adapteva: More Flops, Less Watts. Epiphany Offers Floating-Point Accelerator for Mobile Processors. // Microprocessor Report, June 2011
  10. ^ Michael Feldman, Adapteva Unveils 64-Core Chip // HPCWire
  11. ^ Andreas Olofsson, Epiphany Documentation Release
  12. ^ Update #46: First Parallella User Created Video
  13. ^ a b Andrew Back, Introducing the $99 Linux Supercomputer, Linux.com, 24 January 2013: " pledges of $99 or more being rewarded with at least one board with a 16-core device. ... The 16-core Epiphany chip delivers 26 GFLOPS of performance and with the entire Parallella computer consuming only 5 watts,"
  14. ^ a b Rick Merritt, Adapteva Kickstarts Hundred-Dollar Supercomputer // EETimes, 9/27/2012
  15. ^ [1]: 7.1.4 Floating-point Unit, page 36 // Adapteva, 2012: "The floating-point unit (FPU) complies with the single precision floating point IEEE754 standard"
  16. ^ Parallella Reference Manual 4.13.2.13, page 6-7 // Adapteva, 2013
  17. ^ "Parallella - Supercomputing for Everyone(slidecast)" // Adapteva Founder & CEO Andreas Olofsson (2012-09-28)
  18. ^ Parallella: A Supercomputer For Everyone by Adapteva, Project page at Kickstarter
  19. ^ Parallella: A Supercomputer For Everyone // Kickstarter project, by Adapteva
  20. ^ Hiawatha Bray, Adapteva creates efficient, cheap microchip with help from Kickstarter. ‘Crowdfunding’ puts a tiny, fast computer closer to production // The Boston Globe, December 2, 2012
  21. ^ 64-core version of the Parallella board now offered! // Adapteva blog at Kickstarter, Oct 25, 2012: "The Epiphany-IV (64+2) core Parallella board will be offered for pledges above $750. ... the fact that we only get 50 dies per wafer for these initial prototype runs. We can't disclose wafer pricing and yields at 28nm,"
  22. ^ Joel Hruska, [2] // Extremetech, September 28, 2012
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