OpenPIC and MPIC
In order to compete with Intel's Advanced Programmable Interrupt Controller (APIC), which had enabled the first Intel 486 multiprocessor systems, in early 1995 AMD and Cyrix proposed as somewhat similar-in-purpose OpenPIC architecture supporting up to 32 processors.[1] The OpenPIC architecture had at least declarative support from IBM and Compaq around 1995.[2] No x86 motherboard was released with OpenPIC however.[3] After the OpenPIC's failure in the x86 market, AMD licensed the Intel APIC Architecture for its AMD Athlon and later processors.
IBM however developed their MultiProcessor Interrupt Controller (MPIC) based on the OpenPIC register specification. Through various implementations, the MPIC was included used in some PowerPC reference designs and concrete computers. MPIC supports up to four processors and up to 128 interrupt sources. In the reference IBM design, the processors share the MPIC over a DCR bus, with their access to the bus cotrolled by a DCR Arbiter.[4] IBM used a MPIC based on OpenPIC 1.0 in their RS/6000 F50 and one based on OpenPIC 1.2 in their RS/6000 S70. Both of these systems used a dual 8259 on their PCI-ISA bridges.[5] An IBM MPIC was also used in the RS/6000 7046 Model B50.[6] The Apple Hydra chip (from the 1990s MacOS era) implemented a MPIC alongside a SCSI controller, ADB controller, GeoPort controller, and timers.[7] The MPIC was also incorporated in the newer K2 I/O controller used in some Power Mac G5s.[8][9]
See also
References
- ^ "OpenPIC Definition from PC Magazine Encyclopedia". Pcmag.com. 1994-12-01. Retrieved 2011-11-03.
- ^ Brooke Crothers (20 March 1995). AMD, Cyrix offer up alternative SMP spec. InfoWorld. p. 8. ISSN 01996649 Parameter error in {{issn}}: Invalid ISSN..
- ^ André D. Balsa, Note attached to "Linux Benchmarking: Part III -- Interpreting Benchmark Results" appearing in Issue 24 of Linux Gazette, January 1998
- ^ IBM Multiprocessor Interrupt Controller. Data Book
- ^ Arca Systems TTAP Evaluation Facility The IBM Corporation RS/6000 Distributed System Running AIX Version 4.3.1. TCSEC Evaluated C2 Security, p. 29
- ^ RS/6000 7046 Model B50 Handbook, November 1999, IBM document G24-7046-00, p. 107
- ^ Yellowknife Reference Platform Hardware Design Manual, p. 11
- ^ Take a Look Inside the G5-Based Dual-Processor Power Mac
- ^ Power Mac G5 Developer Note (Legacy), p. 26
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