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Fast interrupt request

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ARM architecture supports two types of interrupts: fast interrupt requests (FIQs), for fast, low latency interrupt handling and Interrupt Request (IRQs), for more general interrupts[1][2].

An FIQ takes priority over an IRQ in an ARM system. Also, only one FIQ source at a time is supported. This helps reduce interrupt latency as the interrupt service routine can be executed directly without determining the source of the interrupt. A context save is not required for servicing FIQ since it has its own set of banked registers. This reduces the overhead of context switching.

References

  1. ^ https://infocenter.arm.com/
  2. ^ https://www.marilynwolf.us/CaC3e/
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