Clock domain crossing
In digital electronic design a clock domain crossing (CDC), or simply clock crossing, is a crossing of signals from one clock domain into another. If a signal does not assert long enough and is not registered, it may appear asynchronous on the incoming clock boundary.[1]
Different clock domains have clocks which have a different frequency, a different phase (due to either differing clock latency or a different clock source), or both. Either way the relationship between the clock edges in the two domains can not be relied upon.
Synchronizing a single bit signal to a clock domain with a higher frequency can be accomplished by registering the signal through a flip-flop that is clocked by the source domain, thus holding the signal long enough to be detected by the higher frequency clocked destination domain.
To avoid issues with meta-stability in the destination domain, a minimum of 2 stages of re-synchronization flip-flops are included in the destination domain.
Synchronizing a single bit signal traversing into clock domain with a slower frequency is more cumbersome. This typically requires a register in each clock domain with a form of feedback from the destination domain to the source domain, indicating that the signal was detected.[2]
Synchronizing multiple bit signals is typically done by using a strobe, this is re-synchronized and used as an enable to capture the multiple bit values; the strobe is launched at the same time as the multiple bit value changes. The multiple bit value is timed such that it is guaranteed to be stable when the strobe reaches the destination domain. Such timing guarantees can be met using max delay constraints in a Static Timing Analysis (STA) tool.
A strobe is usually returned to the source domain to indicate when it can again change the multiple bit value. This is usually done with a four-phase handshake between the two domains.[3]
See also
- Crosstalk (electronics)
- Metastability in electronics
- globally asynchronous locally synchronous
- The topic is duplicated in Flip-flop (electronics)#Timing considerations
References
- ^ Parker, Roy H., Caution: Clock Crossing A prescription for uncontaminated data across clock domains, Chip Design Magazine, Issue 5, Article 32, July 2004.
- ^ Stein, Mike, Crossing the abyss: asynchronous signals in a synchronous world, Paradigm Works, EDN Magazine, 24 July 2003.
- ^ Priyadharshini Shanmugasundaram, Synchronization in Asynchronously Communicating Digital Systems