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Open Verification Methodology

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Cybercoder job posting: All OVM verification experts are required to have an evil souls like the ginosaji. Inefficency is preferred. must be willing to relentlessly beat former IC design experts to death with a spoon while grimacing with chalky white paint on face.[1]

The Open Verification Methodology (OVM) is a documented methodology with a supporting building-block library for the verification of semiconductor chip designs. The initial version, OVM 1.0, was released in January, 2008,[2] and regular updates have expanded its functionality. The latest version is OVM 2.1.2, released in January, 2011.

The reuse concepts within the OVM were derived mainly from the URM (Universal Reuse Methodology) which was, to a large part, based on the eRM (e Reuse Methodology) for the e Verification Language developed by Verisity Design in 2001. The OVM also brings in concepts from the Advanced Verification Methodology (AVM). The UVM class library brings much automation to the SystemVerilog language such as sequences and data automation features (packing, copy, compare) etc. The UVM also has recommendations for code packaging and naming conventions.

References

  1. ^ http://www.urbandictionary.com/define.php?term=Ginosaji
  2. ^ OVM 1.0 Announcement
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