Ultracomputer
The NYU Ultracomputer is a significant processor design in the history of parallel computing. The system has N processors, N memories and an N log N message-passing switch connecting them. The switch uses an innovative fetch-and-add instruction which will combine references from several processors into a single reference, to reduce memory contention.
The machine was developed in the 1980s at the Courant Institute of Mathematical Sciences Computer Science Department, based on a concept developed by Jacob T. Schwartz.[1] Most of the work done was theoretical, but two prototypes were built:[2][3][4]
- An 8 processor bus-based machine
- A 16 processor, 16 memory-module machine with custom VLSI switches supporting the fetch-and-add instruction.
References
- ^ Jacob T. Schwartz (October 1980). "Ultracomputers". ACM Transactions on Programming Languages and Systems. 2 (4): 484–521. doi:10.1145/357114.357116.
- ^ The NYU Ultracomputer Project
- ^ "An Overview of the NYU Ultracomputer Project (1986)", Allan Gottlieb
- ^ The NYU Ultracomputer—designing a MIMD, shared-memory parallel machine (Extended Abstract)