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IVT vs IDT

Well, there is no "IDT" on an 8086 or a processor operating in real mode... It's called an IVT and has a greatly different structure. On >= 80286 the IVT address in real mode _IS_ loaded in the IDTR (no such register is present < 80286). Technically.

There is no architected way to change the real-mode IDTR on a 286, but it may be possible via LOADALL. At any rate, on a 386+ the real-mode IVT can certainly move around and almost certainly is also subject to the IDTR limit. Reducing the IDTR limit to zero and triggering an interrupt is typically an excellent way to cause processor shutdown. Codegen86 (talk) 19:21, 4 July 2012 (UTC)[reply]

Suggesting removeing or replacing the table in the article

There is a table in the article which describes interrupts installed when running (some version of) Linux. I see little relevance to the general nature of the IDT in the table -- it is entirely Linux specific.

I therefor suggest removing it completly or replaceing it with a table which describes the 32 reserved interrupt vectors, which may be used by the processor.

Proposing merger into sub-section of "Interrupt Vector Table" article

The "Interrupt Vector Table" is a concept that is common across multiple processor architectures. This article is about a specific implementation of this concept on a specific architecture, and therefore, is not appropriate as a replacement for the generalized "Interrupt Vector Table" article that was removed and turned into a redirect. The "Interrupt Vector Table" article has been restored, and should be further expanded upon in terms of the general idea. At the same time, the information should be consolidated by having specific architecture implementations (such as the one described by this article) condensed and turned into smaller sections within the generalized article 75.84.15.136 (talk) 01:36, 5 December 2011 (UTC)[reply]

physical address??

The article now says:

The protected mode IDT may reside anywhere in physical memory. The processor has a special register (IDTR) to store both the physical base address and the length in bytes of the IDT.

Isn't this wrong? Doesn't the IDTR (loaded with the LIDT instruction) contain a virtual, not physical, address? The spec refers to it as a "linear address" - which is a virtual, not physical - address. Nyh (talk) 11:43, 7 June 2012 (UTC)[reply]