ELVEES Multicore

ELVEES Multicore
General information
Launched	2004
Designed by	ELVEES
Performance
Max. CPU clock rate	80 MHz to 300 MHz
Architecture and classification
Technology node	0.25 µm to 0.13 µm
Instruction set	CPU MIPS32 + DSP ELcore
Physical specifications
Cores	1 MIPS + 1-2 DSP;

The Multicore (Template:Lang-ru) is series of a 32-bit microprocessor with embedded DSP cores developed by ELVEES, Russia.

Variants

1892VM3T, (Template:Lang-ru)
- 2 cores: RISCore32 + ELcore-14 (DSP-core with с SISD architecture)
- 0.25 µm process, 18 million transistors, clock rate 80MHz
1892VM2JA, (Template:Lang-ru)
- 2 cores: RISCore32 + ELcore-24 (DSP-core with с SIMD architecture)
- 0.25 µm process, 18 million transistors, clock rate 80MHz
1892VM5JA, (Template:Lang-ru)
- 3 cores: RISCore32 + 2x ELcore-26 (DSP-core with с MIMD architecture)
- 0.25 µm process, 26 million transistors, clock rate 100MHz
1892VM4JA, (Template:Lang-ru)
- 3 cores: RISCore32 + 2x ELcore-26 (DSP-core with с MIMD architecture)
- 0.25 µm process, 26 million transistors, clock rate 100MHz