Talk:Diode–transistor logic

Misleading statement in operation section?

Two diodes in series are commonly used to lower the voltage and prevent any base current when one or more inputs are at low logic level.

Two diodes in series double the voltage, not lower it. It's not clear at all to me from this description how 2 diodes could improve the turnoff of the transistor base (one in the transistor emitter might). Gareth8118 (talk) 12:54, 6 March 2008 (UTC)[reply]

I suspect that was meant to describe an added diode as shown here. Maybe you can fix it. Dicklyon (talk) 15:57, 6 March 2008 (UTC)[reply]

Simplified schematic

It should be emphisized that the diagram is a "Simplified schematic" and does not actually work. Someone should be able to find a "published" schematic that actually works. I can only provide a design similar to those used in early computer designs. I would hate to think that some future engineer would try to build the circuit as shown and find that he wasted his time. UPCMaker (talk) 22:59, 3 April 2008 (UTC)[reply]

I replaced it with a correct one; not quite as simple, but shows a resistor configuration that will make it work. From the GE Transistor Manual (3rd through 6th editions). Dicklyon (talk) 04:53, 4 April 2008 (UTC)[reply]

This is great! You might add a capacitor across R3 which was common for DTL to reduce saturation delay. That was one of the main reasons DTL was faster than RTL. TTL could not allow a speed up capacitor because it would need one on each input resistor and that would have coupled noise from input to input. UPCMaker (talk) 00:10, 5 April 2008 (UTC)[reply]

Sorry about my comments added to the switching circuits. I just wish someone would fix all the errors and miss statements that I guess come from bad publications. We had the DTL schematic fixed but it went back to the bad one. If someone that was doing the work can't comment then can't someone try to research these circuits.UPCMaker —Preceding unsigned comment added by 206.53.104.196 (talk) 12:12, 25 October 2009 (UTC) Italic text —Preceding unsigned comment added by 210.212.253.106 (talk) 08:13, 18 November 2009 (UTC)[reply]

CTDL

I propose creating an article for CTDL for reasons of consistency. Information about CTDL is already part of this article under the section called "CTDL". I looked at http://en.wikipedia.org/wiki/Logic_family and I noticed that most subclasses of circuits are linked to specific articles.

Aside from this, I would like to understand why DTL became CTDL and not CDTL.

ICE77 (talk) 01:42, 19 February 2011 (UTC)[reply]

Right now it's two lines in this article - myself, I wouldn't bother spinning it out to its own article unless there was a whole lot more about it. How notable was CTDL? If it had inductors in it, it almost certainly never made it to the monolithic integrated circuit stage. --Wtshymanski (talk) 03:24, 19 February 2011 (UTC)[reply]

If that's the case, then DCTL should not be a separate article. It should follow under RTL in a section called "DCTL". Is there any suggestion about CTDL and CDTL? Also, what would be the typical values for R₁, R₂, R₃ and R₄?

ICE77 (talk) 04:08, 19 February 2011 (UTC)[reply]

Why are you asking here? Aren't you the guy who was going to write it up? What sources do you have? Dicklyon (talk) 06:17, 19 February 2011 (UTC)[reply]

Dicklyon, I never said I was going to write the article myself. I just proposed the idea of making it.

ICE77 (talk) 03:38, 20 February 2011 (UTC)[reply]

CTDL is not distinguished by speed up capacitors or peaking inductors.

Looking at the 1401 prints, the "Complemented" moniker is a naming convention. What the 1401 calls complemented "AND" gate is what we'd call a NAND gate. See page 83, 'CTDL - TWO WAY "AND" NPN'. Except there is a twist with the logic levels. CTDL has two sets of logic level definitions: one for positive logic and the other for negative logic. There are both NPN (-6 to +6 supply, in+ out- logic) and PNP (-12 to 0 supply, in- out+ logic) flavors for gates. See page 84, 'CTDL - TWO WAY "AND" PNP'. The input logic levels are different than the output logic levels. That avoids R1 and R3 (and the whole noise immunity divider). CTDL does not "add a capacitor across R3" because R3 does not exist in the typical gate.

There's another game of complementary going on here - the designers expected to alternate NPN and PNP gates to consistently . There are level translators. See page 98. These level translators use a speed up capacitor across R3.

The basic AND gates appear to minimize time to come out of saturation with high level drive.

(The designers were also using current mode (page 96) and wired-or emitter followers (page 97). There are also other merged modules.)

Adding a peaking inductor to the load speeds things up, but that does not change that the basic logic is DTL. Peaking inductors were a common way to speed up transistors; Tektronix did it a lot in their amplifiers; I think it was called a T-coil.

CTDL has plenty of engineering insight, but it is not worthy of a separate article yet. DEC had something like FLIP modules, and it would be interesting to know if they used two different logic levels.

Glrx (talk) 17:26, 19 February 2011 (UTC)[reply]

Is it true?

"In an integrated circuit version of the gate, two diodes replace R3 to prevent any base current when one or more inputs are at low logic level. Also R4 is removed(?), and the integrated circuit runs off a single power supply voltage." Circuit dreamer (talk, contribs, email) 10:39, 17 April 2011 (UTC)[reply]

The cited web page does not support removing R4. The Computer History Museum has some interesting docs and refs that suggest the Signetics SE100 line had poor noise immunity. Perhaps the SE100 line deleted R4 and Fairchild's μL930 line used the resistor. Some old datasheets might answer the question. To me, R4 is needed to set a decent drop on the two series resistors and guarantee cutoff. Some WP:RS should be used to justify a statement about deleting R4. (See also http://homepages.nildram.co.uk/~wylie/ICs/monolith.htm for family overview and bib; http://web.archive.org/web/20050820002220/http://www.stanford.edu/group/mmdd/SiliconValley/ElectronicNews/Monolithics.text/Monolithic.rtf stating SE100 DTL had poor noise immunity; sensitive to clock waveform.) Glrx (talk) 17:19, 17 April 2011 (UTC)[reply]

We are talking about the circuit with two series connected base diodes (e.g., [1]), aren't we? The problem of this solution is the absence of a return path for discharging the base. So, I suppose that R4 is not simply removed but it is connected to ground (as it is shown in [2]). Circuit dreamer (talk, contribs, email) 20:00, 17 April 2011 (UTC)[reply]

Sorry, I see you have corrected it. Circuit dreamer (talk, contribs, email) 20:09, 17 April 2011 (UTC)[reply]

Speedup capacitor

Where are the sources for the speedup capacitor? It seems to me that with the diodes it can't possibly help in both directions; if it speeds up stored charge removal, it probably doesn't help the turnon much if at all (in the circuit shown); certainly it doesn't act like a differentiator or "force the base current" in this case. Dicklyon (talk) 15:51, 23 April 2011 (UTC)[reply]

Horowitz&Hill have said on page 908, "A small "speedup" capacitor across the base driving resistor can reduce storage time by providing a pulse of current to remove base charge at turn-off, and in addition it increases base drive current during turn-on transitions."

Diodes (as connected) do not impede charging and discharging of the capacitor. The capacitor acts as a differentiator since we apply voltage across it as an input and take the current through it as an output. I suggest to scrutinize the circuit operation during the two states. It would be well if we know the exact values of the elements (resistances and voltages). Circuit dreamer (talk, contribs, email) 17:50, 23 April 2011 (UTC)[reply]

I added two refs. Mot HS STH is silent about helping with turn on. I included its qualifying comment about low Z input drive because that can be true for the gate shown in this article for turn off. For turn on, the input diodes are off (ie, hi-Z drive), so the diode gate pull up resistor is the driving Z. I think H&H overstate the turn on benefit for logic, but the comment may be appropriate for switchmode drive. H&H are addressing storage time in the abstract and not specifically for DTL. Also, if the capacitor is too big, it will saturate the transistor. Glrx (talk) 19:48, 23 April 2011 (UTC)[reply]