R2000 microprocessor
The R2000 is a microprocessor chip set developed by MIPS Computer Systems that implemented the MIPS I instruction set architecture (ISA). Introduced in January 1986, it was the first commercial implementation of the MIPS architecture. Initially, the R2000 was a board-level product, available as a module, that competed with Digital Equipment Corporation (DEC) VAX microprocessors and the Motorola 68000. In 1987, MIPS began offering the R2000 as is to compete with the Intel Corporation 80386. R2000 users included Ardent Computer, DEC, and Silicon Graphics.
The chip set consisted of the R2000 microprocessor, R2010 floating-point accelerator, and four R2020 write buffers. The R2020 buffered writes to the memory, preventing the R2000 from having to wait for a write to complete before continuing to perform other operations as long as there were entries in the buffer available (each R2020 implemented a single entry). This improved performance as the memory was typically significantly slower than the chip set.
The R2000 was available in 8.3, 12.5 and 15 MHz grades. The die contained 110,000 transistors and measured 80 mm2 in a 2.0 μm double-metal CMOS process. MIPS was fabless semiconductor company, that is, they did not have the capability to fabricate integrated circuits. The chip set was initially fabricated for MIPS by Sierra Semiconductor and Toshiba. In December 1987, MIPS licensed Integrated Device Technology, LSI Logic, and Performance Semiconductor to fabricate and market the R2000. Sierra and Toshiba continued to serve as foundries.
LSI fabricated the chip set in its 2.0 μm double-metal CMOS process and marketed it as the LR2000. Performance Semiconductor fabricated the chip set in its PACE-I 0.8 μm double-metal CMOS process and marketed it as the PR2000.
In 1988, an improved version was introduced, the R2000A. It was composed of the R2000A and R2010A ICs. It operated at 12.5 and 16.67 MHz.
References
- Furber, Stephen Bo (1989). VLSI RISC Architecture and Organization. p. 132. CRC Press.