Talk:Interrupt vector table

Since this will be my first non-trivial contribution to Wikipedia, I thought I'd put my text up in the talk page first. I would not consider myself a real expert, but I have been able to extend the article a bit. I still need to add links to other relevant Wikipedia articles, but I'd rather do that when people agree on the body text. As English is not my first language, spelling and grammar corrections, as well as general improvements on sentence construction, are very welcome :)

Proposal for new text:

The Interrupt Descriptor Table (IDT) provides the processor with information about what code is to be executed when an interrupt or exception occurs. The details in the description below apply specifically to the Intel IA-32 architecture (x86 and Pentium-type processors) 80286 processor or newer, operating in protected mode. The Intel Architecture Software Developer's Manual, Volume 3: System Programming Guide specifies the behaviour of (amongst other things) the IDT in great detail. Other processor architectures may have a similar feature, possibly under another name, but details may differ.

Use of the IDT can be triggered by three types of events: hardware interrupts, software interrupts and exceptions, which together are often simply referred to as "interrupts". In total up to 256 of these can be defined, each with their own unique identifier which is called a vector.

The IDT now is an array of 8-byte descriptors stored consecutively in memory and indexed by the interrupt vector. These descriptors can be either Interrupt Gates, Trap Gates or Task Gates. Interrupt and Trap Gates point to a memory location containing code to execute by specifying both a segment (present in either the GDT or LDT) and an offset within that segment. The main difference between these two is that an Interrupt Gate will turn off hardware interrupts, making it especially suitable to service hardware interrupts, while a Trap will leave hardware interrupts enabled and is thus mainly used for handling software interrupts and exceptions. Finally, a Task Gate will cause the currently active Task-State Segment to be switched, effectively handing over use of the processor to another program, thread or process. Unlike the GDT, the programmer is allowed to store a descriptor in the first entry of the IDT, i.e. for interrupt vector 0.

The IDT may reside anywhere in physical memory. The processor has a special register (IDTR) to store both the physical base address and the length in bytes of the IDT. When an interrupt occurs, the processor multiplies the interrupt vector by 8 and adds the result to the IDT base address. With help of the IDT length, the resulting memory address is then verified to be within the table; if it is too large, an exception is generated. If everything is okay, the 8-byte descriptor stored at the calculated memory location is loaded and actions are taken according to the descriptor's type and contents.

A fully populated IDT is 2 kbyte (256 entries of 8 bytes each) big. In many systems it is not necessary to use all of it, because the limited amount of hardware interrupts and exceptions have been assigned the lowest vectors, and the number of necessary software interrupts is often limited as well. It is sufficient to populate the IDT up to the highest used interrupt vector, and set the IDT length portion of the IDTR accordingly.

Ttlogic 13:50, 11 October 2005 (UTC)[reply]

Welcome Ttlogic! Now just be bold and others will correct your work. (Your text looks like a good starting point to me.) NostinAdrek 16:54, 13 December 2005 (UTC)[reply]

Renaming the article back to "Interrupt Descriptor Table"

I tried to rename the article back to "Interrupt Descriptor Table", but this apparently requires admin privileges. Does someone have the knowledge and courage to "fill the paperwork" for that? Adam Mirowski 20:35, 18 February 2006 (UTC)[reply]

May I suggest that you instead modify Interrupt Descriptor Table from a redirect to a full article containing the information you think should be there. Jsmethers 19:02, 19 February 2006 (UTC)[reply]

Why did you start messing with this article in the first place, Jsmethers? It described a specific x86 concept, the protected mode IDT. It was not entirely accurate, but then what articles are? You renamed it into something very generic without providing any significant additional content which would justify this move. BTW, an IVT is also a specific x86 concept and this is how the awful Time slice multiplexing page uses it. Then you deleted my fixes for the errors contained within. There are no links to this article which would justify it talking about anything else than the IDT. OK, I can put the fixed content into a new "Interrupt descriptor table" page, but then we should delete the content from here, and what will remain? Are you ready to describe interrupt vector tables on different processors, or on the x86 in real or V86 mode? Besides, moving content "by hand" is considered incorrect, since the edit history is lost. Adam Mirowski 20:44, 19 February 2006 (UTC)[reply]

My idea of how things could be fixed:

This article could be renamed back to "Interrupt Descriptor Table". This is a proper noun, not a generic concept, so uppercasing initials is justified.
The "Interrupt descriptor table" article could link here. Or be deleted, as there are currently no articles which reference this name.
An "Interrupt vector table" article could talk about generic issues. Or be deleted. Nobody seems to need such an article.
An "Interrupt Vector Table" article could describe the real-mode and virtual 8086 mode Interrupt Vector Tables as found on x86 processors. These tables are distinct from the IDT and in protected mode exist in parallel to it.

Adam Mirowski 23:55, 19 February 2006 (UTC)[reply]

Fine with me. "Fix" it however you'd like. I really do not care. Jsmethers 04:53, 20 February 2006 (UTC)[reply]