Behavioral modeling

Behavioral Modeling is a high-level circuit modeling technique where behavior of logic is modeled.

The Verilog-AMS and VHDL-AMS languages are widely used to model logic behavoir.

Other modeling approaches

• RTL Modeling : logic is modeled at register level.
• Structural Modeling : logic is modeled at both register level and gate level.

References

Analog Behavioral Modeling with the Verilog-A Language by Dan FitzPatrick, Ira Miller.