OpenSPARC
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OpenSPARC is an open source hardware project started in December 2005. The initial contribution to the project was Sun Microsystems' Register transfer level (RTL) Verilog code for a full 64-bit, 32-thread microprocessor, the UltraSPARC T1 processor. On 21 March 2006, Sun released the source code to the T1 IP core under the GNU General Public License. OpenSPARC T1 is 8 cores, 8 pipelines with 32 threads.
On December 11, 2007, Sun also made the UltraSPARC T2 processor's RTL available via the OpenSPARC project.[1]OpenSPARC T2 is 8 cores, 16 pipelines with 64 threads.
See also
- LEON
- OpenRISC
- S1 Core (a derived single-core implementation)
- SPARC (Scalable Processor ARChitecture)
- Field-programmable gate array
References
- ^ "Sun Accelerates Grown of UltraSPARC CMT Eco System". Sun Microsystems. 2007-12-11. Retrieved 2008-05-23.