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This is an old revision of this page, as edited by 66.166.202.162 (talk) at 21:25, 26 February 2010 (Problems with the Article). The present address (URL) is a permanent link to this revision, which may differ significantly from the current revision.

The reason why one should not change reconfigurable computing to reconfigurable system is to understand what exactly reconfigurable computing addresses. To baseline; a computer system is defined as an organised collection of hardware and software components designed to manipulate data in a '''''''meaningful''''''' manner. An abstract way to model such computer systems is to use a method called computer system model (CSM). CSM is composed of three architecture types providing clear abstraction level views to a computer system. These architecture types are known as computer architecture (CA) which is everything to do with the CPU, implementation architecture (IA) which is everything to do with the platform and software architecture (SA) also known as system architecture and deals with the software domain of a computer system. Computer Architecture addresses the organisation and design of the CPU, a basic CPU is composed of two domains which are; Control Path and Data Path. However, these two domains are heavily influenced by the computational configuration adopted. There are two computation configurations which are; Temporal –compute in time and Spatial –compute in space. Examples of temporal solutions would be; Pentium, Opteron, Xeon, Itanium, Power and SPARC. And examples of spatial would be ASICs. Without delving deep into CPU design a short synopsis would be; CPUs that use a temporal configuration generally has a large control path over the data path. As an example the Itanium McKinley has a control path of ~71% and a data path of ~7.4% the remaining area is used for miscellaneous circuitry. Whereas an ASIC, the ideal spatial solution will use ~80% data path and 15% control path. Spatial solutions like ASICs offer greater performance/watt/cycle than there temporal solutions, which, temporal solutions counteract this by offering better application flexibility through programmability. Reconfigurable Computing (RC) introduces a third type of computation configuration which is a mix between temporal and spatial. How the blend of this mix is done depends on the innovation of the RC. As I described earlier computational configuration influences the CA’s control and data paths, and RC is a new form of computational configuration thus, RC is not a computer system it is in fact an architectural form of CA. Which means the best suited name is Reconfigurable Computing and not Reconfigurable System.

Terminology

I converted the terminology into a table and moved it into the near bottom. Having it as sections made it hard to get an overview of the article. BTW, this is the first time I've seen an article have a whole terminology listing, is it really needed or could we link to relevant terms instead? Henrik 20:33, 28 February 2006 (UTC)[reply]

Problems with the Article

1. The paper talks about "Estrin" hybrid computers. As far as I am aware this is not a commonly used term in reconfigurable computing. I would recommend it is not used unless anyone can provide proof that it is a current and widespread term.

2. Too much marketing material is reproduced here in relation to SRC and Mitrionics. There are a lot of players in this market, loads will die off and loads more will emerge. This article should be futureproofed by toning the down the constant references to current market players. It will also lessen the temptation for the market players themselves to increase the amount they're referred to in this article.

3. Only one author has ever used the term "Reconfigurable Computing Paradox", so it seems like it shouldn't be used here until it gains more currency in the greater research community.

Generally the article is not in a good shape. I think we need to start discussing a new plan for a total rewrite of this article.

82.46.67.130 17:53, 26 July 2007 (UTC)[reply]

"Gerald Estrin's landmark paper proposed the concept of a computer made of a standard processor and an array of “reconfigurable” hardware." This is just flat wrong. Estrin created a system whereby you could add an instruction to the instruction set by putting a card in a card cage. If you want to say Estrin's paper is the "landmark" paper in reconfigurable computing you might as well go back to John von Neumann (Estrin studied under von Neumann). Estrin's name first comes up in a Scientific American article. In that same issue was an ad by Virtual Computer Corporation, Xilinx and Marshall Electronics about the H.O.T Works development system for only $995.00. 66.166.202.162 (talk) 21:57, 12 March 2008 (UTC) Steve Casselman[reply]

[1] J. Villasenor, W. H. Mangione-Smith, "Configurable Computing," Scientific American, pp.66-71, June 1997.

In the section "Examples for hybrid computers" it is interesting to note that DRC is not mention when Cray replaced the Octigabay system with RPUs from DRC Computer (www.drccomputer.com) (www.cray.com/Assets/PDF/products/xt/CrayXR1Blade.pdf). In 1986 I wrote my first paper which talked about taking C, compiling it down into a series of bitstreams, and loading them one after the other. In 1989 I received a phase I SBIR (http://tech-net.sba.gov/tech-net/public/dsp_award.cfm?IMAwrdSeqNmb=9808) to work on the hardware to do that. I filed my first patent in 1992 (US5684980). I invented the FPGA in the Opteron socket 16 days after the Opteron was announced. While out trying to raise money we talked to a VC who had Steve Wallach do some due diligence and talk to some of our customers. He then founded Convey as the "first hybrid core computer." I have not edited any of the pages in this section because I have been at it for so long that it would not be right for me to do so. However I can't think of anyone else who has been at it so long and is still making significant contributions to the field.

Steve Casselman, 2/26/2010 —Preceding unsigned comment added by 66.166.202.162 (talk) 21:14, 26 February 2010 (UTC)[reply]

$1,000 Supercomputer?

http://www.cnn.com/TECH/computing/9906/15/supercomp.idg/ Back in 1999, Starbridge Systems claimed it would have a $1,000 supercomputer for sale within 18 months, and that it would be 60,000 times as fast as a 350 MHz Pentium 2.

What happened? It's been nearly a decade and still no $1,000 supercomputer. Emails to the company haven't been answered. —Preceding unsigned comment added by 72.67.35.214 (talk) 10:05, 5 March 2008 (UTC)[reply]


Terminology and Self-Promotion

The terms "flowware" and "configware" are not standard within the field. This is pure self-promotion from Reiner Hartenstein and company. I witnessed him at a conference arguing with other researchers to try to force his terminology, which is rather outdated and meaningless. Just follow the link to Reiner Hartenstein and you will see that there is an excessively long page for someone with only minor notability. Compare this with other academics of similar importance. I think this article should be cleaned up to reflect the consensus of the reconfigurable computing researchers and not of one man.

208.191.58.164 (talk) 12:21, 13 November 2008 (UTC)[reply]

I agree, this is self-promotion by Reiner Hartenstein, or Rainier as he spells it on wikipedia. I have marked this page as COI, and I believe the entire Reconfigurable computing as a paradigm shift: Hartenstein's anti machine section should be removed. I've also proposed the anti-machine page be deleted. Dsav (talk) 16:49, 21 April 2009 (UTC)[reply]

FPGA-based programmable, on demand co-processors

"[...]a solution where a softcore activates critical application-specific instructions that are coded in a hardware definition language in the same chip can be a very efficient solution in some cases. An even more powerful solution is the combination of a dedicated microprocessor core and an FPGA in the same chip. Such hybrid solutions are now used in some embedded systems." [1] —Preceding unsigned comment added by Parallelized (talkcontribs) 09:13, 24 July 2008 (UTC)[reply]