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Ensoniq Signal Processor

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ENSONIQ Signal Processor (ESP)

The ESP chip is a custom digital signal processor chip with over 75,000 transistors, used in all of the company's musical instruments and some multimedia products. It is a high-speed microprocessor with an instruction set that is optimized for manipulating audio data, which has typical sample rates of between 10 kHz and 50 kHz. The ESP chip is capable of creating a wide range of digital effects including reverb, delay, echo, flanging, chorusing, harmonizing, equalization, and distortion, and is capable of generating multiple effects simultaneously.

The ESP is a VLSI device designed in a 1.0 micron double-metal CMOS process. It is optimized for signals in the audio frequency range. The multiplicity and flexibility of the data paths in the ESP allows many DSP operations to be accomplished in a minimum number of microinstruction steps. Its nominal instruction cycle is 250 ns, yielding program lengths from about 64 to 160 microinstructions at typical sample rates. Because the ESP chip is fully programmable, the range of effects is unlimited. (Competitive DSP products are generally limited to their specific design functions.)

The major features of the ESP chip are:

  • 48 Pin DIP or 52 Pin PLCC
  • Separate Address Generator ALU
  • 4 Programmable Serial I/O Channels (I2S or Sony Format)
  • On-Chip Data and Microprogram Memory
  • 8-Bit Address/Data Multiplexed Host CPU Interface
  • External Sample Rate Synchronization
  • Multiplexed Addressing for Simple DRAM Interface
  • Host Access to ESP DRAM

The architecture of the ESP chip is implemented by the following major components:

  • ALU - 24-bit wide, capable of 16 different instructions
  • Multiplier - 24x24 bit with dedicated 48 bit accumulator
  • Separate Address Generator ALU
  • Microinstruction Memory Array (160 x 45 bits)
  • General Purpose Register Array (192 x 24 bits)
  • 23 Special Purpose Registers
  • Three 24-bit wide data paths
  • Serial Digital I/O (4 stereo channels, I2S or Sony)
  • Host interface

References