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Embedded Supercomputing

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Embedded Supercomputing [1] a relatively new solution which targets fine grain and cores grain parallelism altogether. This combination thought to best for exploiting by targeting fine grain parallelism towards FPGAs and coarse grained parallelism towards super computers or clusters.

Basically Embedded Supercomputing is a hybrid network of CPU and FPGA hardware, where FPGA acts as external co-processor to CPU. However, this programming model still evolving.


This file may be deleted after Thursday, 26 March 2009.

This file may be deleted after Thursday, 26 March 2009.


References

  1. ^ AVerentziotis, Evangelos (MARCH 2002). The EFTOS Approach to Dependability in Embedded Supercomputing. {{cite book}}: Check date values in: |year= (help); line feed character in |title= at position 48 (help)CS1 maint: year (link)
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