Nodal analysis
In electrical engineering, nodal analysis, node-voltage analysis, or the branch current method is a method of determining the voltage (potential difference) between "nodes" (points where elements or branches connect) in an electrical circuit. It is used to solve for the voltages and currents at any point in a circuit without working through many individual KCL or KVL rules.
It simplifies the number of equations that would have been developed through KCL and KVL to just the equations that describe the voltage and current according to a node within the circuit diagram. It uses KCL by realizing that the total current entering a node must equal the total current leaving a node. KVL is used to find the currents by using the voltage drop between the node and other nodes to find the current required to go through these paths to create the voltage drop. In other words, nodal analysis uses KVL to find the voltages that would create currents that would satisfy KCL.
This method is very powerful as many different circuit elements can be modeled. Active circuit elements such as operational amplifiers can be added to the analysis. These elements can be as simple or complicated as desired to achieve the fidelity needed in the simulation. For example: A number of different transistor models are available that can be used in the nodal analysis. The only requirement is that the elements are linear.
Method
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- Label all the nodes in the circuit (e.g. 1, 2, 3...), and select one to be the "reference node." It is usually most convenient to select the node with the most connections as the reference node.
- Assign a variable to represent the voltage of each labeled node (e.g. V1, V2, V3...). The values of these variables, when calculated, will be relative to the reference node (i.e. the reference node will be 0V).
- If there is a voltage source between any node and the reference node, by Kirchhoff's voltage law, the voltage at that node is the same as the voltage source's. For example, if there is a 40 V source between node 1 and the reference node, node 0, V1 = 40 V.
- Note any voltage sources between two nodes. These two nodes form a supernode. By Kirchhoff's voltage law, the voltage difference at these two nodes is the same as the voltage source. For example, if there is a 60 V source between node 1 and node 2, V1 − V2 = 60 V.
- For all remaining nodes, write a Kirchhoff's current law equation for the currents leaving each node, using the terminal equations for circuit elements to relate circuit elements to currents. For example, if there is a 10 Ω resistor between nodes 2 and 3, a 1 A current source between nodes 2 and 4 (leaving node 2), and a 20 Ω resistor between nodes 2 and 5, the KCL equation would be (V2 − V3)/10 + 1 + (V2 − V5)/20 = 0 A.
- For all sets of nodes that form a supernode, write a KCL equation, as in the last step for all currents leaving the supernode, i.e. sum the currents leaving the nodes of the supernode. For example, if there is a 60 V source between nodes 1 and 2, nodes 1 and 2 form a supernode. If there is a 40 Ω resistor between nodes 1 and the reference node, a 2 A current source between nodes 1 and 3 (leaving node 3), and a 30 Ω resistor between nodes 2 and 4, the KCL equation would be (V1 − 0)/40 + (−2) + (V2 − V4)/30 = 0 A.
- The KCL and KVL equations form a system of simultaneous equations that can be solved for the voltage at each node.
See also
- Ohm's law
- Kirchhoff's current law
- Millman's Theorem
- Series and parallel circuits
- Wye-delta transform
- Mesh analysis
- Analysis of resistive circuits