Structured ASIC platform

Structured ASIC is an intermediate technology between ASIC and FPGA offering high performance, a characteristic of ASIC, and low NRE cost, a characteristic of FPGA. Using Structured ASIC allows products to be introduced quickly to market, to have lower cost and to be designed with ease. The objective is to open new opportunity in Programmable Logic Device market based on Structured ASIC.

Structured ASIC is an intermediate technology between ASIC and FPGA offering high performance, a characteristic of ASIC, and low NRE cost, a characteristic of FPGA. Using Structured ASIC allows products to be introduced quickly to market, to have lower cost and to be designed with ease. The objective is to open new opportunity in Programmable Logic Device market based on Structured ASIC.

Structured ASIC is an intermediate technology between ASIC and FPGA, offering high performance, a characteristic of ASIC, and low NRE cost, a characteristic of FPGA. Using Structured ASIC allows products to be introduced quickly to market, to have lower cost and to be designed with ease. The objective is to open new opportunity in Programmable Logic Device market based on Structured ASIC.

Work at CUHK:

A structured ASIC research project in on-going at CUHK, the main research and development work in this project includes:

1. study methods to map quickly a FPGA design to a Gate Array, and develop corresponding EDA tools.
2. design a Programmable Fabric.
3. integrate the Programmable Fabric with a highly flexible and configurable SoC ASIC, to realize an IC design and verification platform that offers short time-to-market and low design cost.

The platform developed will be quick and easy to use, will represent low risk in design and testing, hence, will benefit IC design houses in both Hong Kong and Shenzhen. The dramatic reduction in design and testing cost means its market potential can be far and wide.