OpenSPARC
OpenSPARC is an open source hardware project started in December 2005. The initial contribution to the project was Sun Microsystems' Register transfer level (RTL) Verilog code for a full 64-bit, 32-thread microprocessor, the UltraSPARC T1 processor. On 21 March 2006, Sun released the source code to the T1 IP core under the GNU General Public License.
On 7 August 2007, Sun announced that the UltraSPARC T2 processor's RTL will also be made available via the OpenSPARC project, and released the specification on 11 December of the same year[1][2] [3] .
See also
- LEON
- OpenRISC
- S1 Core (a derived single-core implementation)
- SPARC (Scalable Processor ARChitecture)
- Field-programmable gate array
External links
- OpenSPARC community site
- OpenSPARC information site
- T1 Source code
- T1 Specification
- T2 Specification
- Open Directory: Computers: Hardware: Components: Processors: SPARC: Open Source
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- ^ Ross Shannon (2007-02-26). "Bandwidth Theft". yourhtmlsource.com. Retrieved 2007-11-16.
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