Common Power Format
The Si2 Common Power Format, or CPF is a file format for specifying power-saving techniques early in the design process. In the design of integrated circuits, saving power is a primary goal, and designers are forced to use sophisticated techniques such as clock gating, multi-voltage logic, and turning off the power entirely to inactive blocks. These techniques require a consistent implementation in the design steps of logic design, implementation, and verification. For example, if multiple different power supplies are used, then logic synthesis must insert level shifters, place and route must deal with them correctly, and other tools such as static timing analysis and formal verification must understand these components. As power became an increasingly pressing concern, each tool independently added the features needed. Although this made it possible to build low power flows, it was difficult and error prone since the same information needed to be specified several times, in several formats, to many different tools. CPF was created as a common format that many tools can use to specify power-specific data, so that power intent only need be entered once and can be used consistently by all tools. The aim of CPF is to support an automated, power-aware design infrastructure.
Associated with CPF is the Power Forward Initiative (PFI), a group of compnanies that collaborate to drive low-power design methodology and have contributed to the development of the CPF v1.0 specification. PFI membership spans EDA, IP, library, foundry fables, ASIC, IDM, and equipment companies. In March of 2007, CPF v1.0 was contributed to the Silicon Integration Initiative (Si2) where it was ratified by Si2’s Low Power Coalition (LPC) as a Si2 standard. The LPC controls the ongoing evolution of the CPF v1.0 standard.
Contents
Constructs expressing power domains and their power supplies:
- Logical design: hierarchical modules can be specified as belonging to specific power supply domains
- Physical design: explicit power/ground nets and connectivity can be specified per cell or block.
- Analysis: different timing library data for cases where the same cell is used in different power domains
Power control logic
- Specification of level shifter logic - special cells needed when signals traverse between blocks of different supply voltage.
- Specification of isolation logic - what special logic is needed for signals that traverse between blocks that can be powered up and down independently.
- Specification of state-retention logic - when blocks are switched off entirely, how is the state retained?
- Specification of switch logic and control signals - how are blocks switched on and off?
Definition and verification of power modes (standby, sleep, etc.)
- Mode definitions
- Mode transition expressions
An Example of CPF can be found below:
<head> <title>set_cpf_version 1</title> <style> </style> </head>
<body bgcolor=white lang=EN-US style='tab-interval:.5in'>
set_cpf_version 1.0<o:p></o:p>
<![if !supportEmptyParas]> <![endif]><o:p></o:p>
define_level_shifter_cell -cells LVLHLEHX* \<o:p></o:p>
-input_voltage_range 1.2 \<o:p></o:p>
-output_power_pin VDD \<o:p></o:p>
-output_voltage_range 0.8 \<o:p></o:p>
-direction down \<o:p></o:p>
-output_voltage_input_pin EN \<o:p></o:p>
-ground VSS \<o:p></o:p>
-valid_location to <o:p></o:p>
<![if !supportEmptyParas]> <![endif]><o:p></o:p>
define_level_shifter_cell -cells LVLHLELX* \<o:p></o:p>
-input_voltage_range 1.2 \<o:p></o:p>
-output_power_pin VDD \<o:p></o:p>
-output_voltage_range 0.8 \<o:p></o:p>
-direction down \<o:p></o:p>
-output_voltage_input_pin EN \<o:p></o:p>
-ground VSS \<o:p></o:p>
-valid_location to <o:p></o:p>
<![if !supportEmptyParas]> <![endif]><o:p></o:p>
define_level_shifter_cell -cells LVLHLX* \<o:p></o:p>
-input_voltage_range 1.2 \<o:p></o:p>
-output_power_pin VDD \<o:p></o:p>
-output_voltage_range 0.8 \<o:p></o:p>
-direction down \<o:p></o:p>
-ground VSS \<o:p></o:p>
-valid_location to <o:p></o:p>
<![if !supportEmptyParas]> <![endif]><o:p></o:p>
define_level_shifter_cell -cells LVLLHEHX* \<o:p></o:p>
-input_voltage_range 0.8 \<o:p></o:p>
-output_power_pin VDD \<o:p></o:p>
-output_voltage_range 1.2 \<o:p></o:p>
-direction up \<o:p></o:p>
-output_voltage_input_pin EN \<o:p></o:p>
-ground VSS \<o:p></o:p>
-valid_location to <o:p></o:p>
<![if !supportEmptyParas]> <![endif]><o:p></o:p>
define_level_shifter_cell -cells LVLLHX* \<o:p></o:p>
-input_voltage_range 0.8 \<o:p></o:p>
-output_voltage_range 1.2 \<o:p></o:p>
-output_power_pin VDD \<o:p></o:p>
-direction up \<o:p></o:p>
-ground VSS \<o:p></o:p>
-valid_location to <o:p></o:p>
<![if !supportEmptyParas]> <![endif]><o:p></o:p>
define_isolation_cell -cells ISOLN* \<o:p></o:p>
-enable EN \<o:p></o:p>
-valid_location to<o:p></o:p>
<![if !supportEmptyParas]> <![endif]><o:p></o:p>
define_isolation_cell -cells "LVLHLEHX* LVLLHEHX* LVLHLELX*" \<o:p></o:p>
-enable EN<o:p></o:p>
<![if !supportEmptyParas]> <![endif]><o:p></o:p>
define_always_on_cell -cells "BUFGX2M BUFGX8M INVGX2M INVGX8M"<o:p></o:p>
<![if !supportEmptyParas]> <![endif]><o:p></o:p>
define_state_retention_cell -cells *DRFF* -restore_function RETN <o:p></o:p>
<![if !supportEmptyParas]> <![endif]><o:p></o:p>
set_hierarchy_separator "/"<o:p></o:p>
<![if !supportEmptyParas]> <![endif]><o:p></o:p>
set libdir ../../../libs<o:p></o:p>
<![if !supportEmptyParas]> <![endif]><o:p></o:p>
set UMC_08v_list "\<o:p></o:p>
$libdir/UMC_130SP/aci/sc-m/synopsys/scmetro_umcl130e_sp_tt_0p8v_25c.lib \<o:p></o:p>
$libdir/UMC_130LL/aci/sc-m/synopsys/scmetro_umcl130e_ll_tt_0p8v_25c.lib \<o:p></o:p>
$libdir/UMC_130/aci/sc-m/synopsys/scmetropmk_umc13sp_tt_0p8v_25c.lib \<o:p></o:p>
"<o:p></o:p>
<![if !supportEmptyParas]> <![endif]><o:p></o:p>
set UMC_120v_list "\<o:p></o:p>
$libdir/UMC_130/aci/sc-m/synopsys/scmetropmk_umc13sp_tt_0p8v_1p2v_25c.lib \<o:p></o:p>
$libdir/UMC_130LL/aci/sc-m/synopsys/scmetro_umcl130e_ll_tt_1p2v_25c.lib \<o:p></o:p>
$libdir/UMC_130SP/aci/sc-m/synopsys/scmetro_umcl130e_sp_tt_1p2v_25c.lib \<o:p></o:p>
"<o:p></o:p>
<![if !supportEmptyParas]> <![endif]><o:p></o:p>
define_library_set -name umc_08v -libraries $UMC_08v_list<o:p></o:p>
<![if !supportEmptyParas]> <![endif]><o:p></o:p>
define_library_set -name umc_120v -libraries $UMC_120v_list<o:p></o:p>
<![if !supportEmptyParas]> <![endif]><o:p></o:p>
set_design core<o:p></o:p>
<![if !supportEmptyParas]> <![endif]><o:p></o:p>
create_power_domain -name PDcore -default <o:p></o:p>
create_power_domain -name PDau -instances alu_inst/aui \<o:p></o:p>
-shutoff_condition {pcu_inst/pau[2]}<o:p></o:p>
<![if !supportEmptyParas]> <![endif]><o:p></o:p>
create_power_domain -name PDlu -instances alu_inst/lui \<o:p></o:p>
-shutoff_condition {pcu_inst/plu[2]}<o:p></o:p>
<![if !supportEmptyParas]> <![endif]><o:p></o:p>
create_power_domain -name PDalu -instances alu_inst \<o:p></o:p>
-shutoff_condition {pcu_inst/palu[2]}<o:p></o:p>
<![if !supportEmptyParas]> <![endif]><o:p></o:p>
create_power_domain -name PDrf -instances rf_inst \<o:p></o:p>
-shutoff_condition {pcu_inst/prf[2]}<o:p></o:p>
<![if !supportEmptyParas]> <![endif]><o:p></o:p>
create_nominal_condition -name high -voltage 1.20<o:p></o:p>
<![if !supportEmptyParas]> <![endif]><o:p></o:p>
update_nominal_condition -name high -library_set umc_120v<o:p></o:p>
<![if !supportEmptyParas]> <![endif]><o:p></o:p>
create_nominal_condition -name low -voltage 0.8<o:p></o:p>
<![if !supportEmptyParas]> <![endif]><o:p></o:p>
update_nominal_condition -name low -library_set umc_08v<o:p></o:p>
<![if !supportEmptyParas]> <![endif]><o:p></o:p>
create_power_mode -name PMcore -domain_conditions {PDcore@high PDau@high PDlu@high PDalu@high PDrf@high} -default<o:p></o:p>
<![if !supportEmptyParas]> <![endif]><o:p></o:p>
#update_power_mode -name PMcore -sdc_files nano32.sdc<o:p></o:p>
<![if !supportEmptyParas]> <![endif]><o:p></o:p>
create_power_mode -name PMau -domain_conditions {PDcore@high PDlu@high PDalu@high PDrf@high} <o:p></o:p>
<![if !supportEmptyParas]> <![endif]><o:p></o:p>
create_power_mode -name PMlu -domain_conditions {PDcore@high PDau@high PDalu@high PDrf@high}<o:p></o:p>
<o:p></o:p>
create_power_mode -name PMalu -domain_conditions {PDcore@high PDrf@high} <o:p></o:p>
<![if !supportEmptyParas]> <![endif]><o:p></o:p>
create_power_mode -name PMrf -domain_conditions {PDcore@high PDau@high PDlu@high PDalu@high} <o:p></o:p>
<![if !supportEmptyParas]> <![endif]><o:p></o:p>
##Isolation<o:p></o:p>
#create_isolation_rule -name iso_rule1 -from PDau -isolation_condition {pcu_inst/pau[0]} -isolation_output low -pins alu_inst/aui/z*<o:p></o:p>
<![if !supportEmptyParas]> <![endif]><o:p></o:p>
create_isolation_rule -name iso_rule1 -from PDau -isolation_condition {pcu_inst/pau[0]} -isolation_output low<o:p></o:p>
<![if !supportEmptyParas]> <![endif]><o:p></o:p>
update_isolation_rules -names iso_rule1 -location to -cells ISOLNX8M<o:p></o:p>
<![if !supportEmptyParas]> <![endif]><o:p></o:p>
#create_isolation_rule -name iso_rule2 -from PDlu -isolation_condition {pcu_inst/plu[0]} -isolation_output low -pins alu_inst/lui/z*<o:p></o:p>
<![if !supportEmptyParas]> <![endif]><o:p></o:p>
create_isolation_rule -name iso_rule2 -from PDlu -isolation_condition {pcu_inst/plu[0]} -isolation_output low<o:p></o:p>
<![if !supportEmptyParas]> <![endif]><o:p></o:p>
update_isolation_rules -names iso_rule2 -location to -cells ISOLNX8M<o:p></o:p>
<![if !supportEmptyParas]> <![endif]><o:p></o:p>
#create_isolation_rule -name iso_rule3 -from PDalu -isolation_condition {pcu_inst/palu[0]} -isolation_output low -pins alu_inst/z*<o:p></o:p>
<![if !supportEmptyParas]> <![endif]><o:p></o:p>
create_isolation_rule -name iso_rule3 -from PDalu -isolation_condition {pcu_inst/palu[0]} -isolation_output low<o:p></o:p>
<![if !supportEmptyParas]> <![endif]><o:p></o:p>
update_isolation_rules -names iso_rule3 -location to -cells ISOLNX8M<o:p></o:p>
<![if !supportEmptyParas]> <![endif]><o:p></o:p>
#create_isolation_rule -name iso_rule4 -from PDrf -isolation_condition {pcu_inst/prf[0]} -isolation_output low -pins rf_inst/z*<o:p></o:p>
<![if !supportEmptyParas]> <![endif]><o:p></o:p>
create_isolation_rule -name iso_rule4 -from PDrf -isolation_condition {pcu_inst/prf[0]} -isolation_output low<o:p></o:p>
<![if !supportEmptyParas]> <![endif]><o:p></o:p>
update_isolation_rules -names iso_rule4 -location to -cells ISOLNX8M<o:p></o:p>
<![if !supportEmptyParas]> <![endif]><o:p></o:p>
###State_Retention<o:p></o:p>
<![if !supportEmptyParas]> <![endif]><o:p></o:p>
create_state_retention_rule -name SRPG_rule1 -restore_edge {!pcu_inst/prf[1]} -instances {rf_inst/rf*}<o:p></o:p>
<![if !supportEmptyParas]> <![endif]><o:p></o:p>
#create_state_retention_rule -name SRPG_rule1 -domain PDrf -restore_edge {!pcu_inst/prf[1]}<o:p></o:p>
<![if !supportEmptyParas]> <![endif]><o:p></o:p>
update_state_retention_rules -names SRPG_rule1 -cell DRFFDX1M -library_set umc_120v<o:p></o:p>
<![if !supportEmptyParas]> <![endif]><o:p></o:p>
#create_state_retention_rule -name SRPG_rule2 -restore_edge {!pcu_inst/pau[1]} -instances {alu_inst/aui/z*}<o:p></o:p>
<![if !supportEmptyParas]> <![endif]><o:p></o:p>
end_design<o:p></o:p>
</body>
</html>
History and controversy
Cadence Design Systems architected the early versions of CPF[1], then contributed it to Si2. This was followed shortly by a competing effort, the Unified Power Format or UPF, proposed as an IEEE standard as opposed to an Si2 standard. UPF has been driven mainly by Synopsys, Mentor Graphics and Magma. The technical differences between the two formats are relatively minor, but the political considerations are harder to overcome[2][3]. Not surprisingly, the Cadence Low-Power Solution supports Si2’s CPF and offered the first complete flow, whereas the Synopsys, Mentor Graphics and Magma offerings all support UPF.
An attempt at convergence is taking place in the [IEEE P1801]] standards working group, providing a migration path (superset formant) for designs that are written in both of the initial formats.
References
- ^ Chi-Ping Hsu, Pushing Power Forward with a Common Power Format - The Process of Getting it Right, EETimes, 5 Nov 2006
- ^ Goering, Richard, IC power standards convergence falters, EETimes, 21 March 2007
- ^ Goering, Richard, IEEE's patent policy fails to quell EDA standards row, EEtimes, 30 April 2007.
- Download CPF specification.
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