Bus functional model
Bus Functional Model or BFM is a non-synthesizable software model of an integrated circuit component. This software model can be used to simulate the behavior of a hardware system before building and testing the actual hardware. BFM are typical written in HDL's languages such as verilog, HDL, or SystemC.
BFM's are often used as reusable building blocks for create simulation testbenches, where the signal ports on a design under test are connected to the appropriate BFM's in the testbench for the purpose of simulation.