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Dynamic frequency scaling

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Dynamic frequency scaling is a technique in computer architecture where a processor is run at a less-than-maximum frequency in order to conserve power. Dynamic frequency scaling is most commonoly used in laptops and other mobile devices, where energy comes from a battery and thus is limited.

Power consumption on a chip is given by the equation:

where P is power, C is the capacitance being switched per clock cycle, and F is the frequency (cycles per second).[1] Frequency reduction reduces power consumption linearly.

References

  1. ^ J. M. Rabaey. Digital Integrated Circuits. Prentice Hall, 1996.