Modified Harvard architecture

In Havard computer architecture the Program and data memory are separate. We can say Harvard architecture needs twice as many address and data pins on the chip. This leads to increase in number of pins required to connect to program and data memory. More pins on a processor means more space,high pin count and more manufacturing cost.

One of the ways to acheive compromise between cost and performance is by using Modified Harvard Architecture.

In this architecture, both address and data have same bus for external interface to memory. But address and data buses are independent for internal memory interface.

The external bus carries data in once cycle and address in another cycle. The decision and separation of data and address is done through timing and multiplexing circuitry.

This type of architecture is very common in DSP processors. ARM9 and StrongARM series use this kind of architecture.