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Page attribute table

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This is an old revision of this page, as edited by Fweeky (talk | contribs) at 22:32, 2 May 2007 (Stub out a short description of Page Allocation Tables (PAT). Basically: like MTRR's, but using page tables instead of fixed ranges. Described in detail in the external link.). The present address (URL) is a permanent link to this revision, which may differ significantly from the current revision.
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The Page Allocation Table (PAT) is an extension to the page table format of certain x86 and x86-64 microprocessors. Like Memory Type Range Registers (MTRRs), they allow for fine-grained control over how areas of memory are cached.

Unlike MTRRs, which provide the ability to manipulate the behavior of caching for a limited number of fixed physical address ranges, Page Allocation Tables allow for such behavior to be specified on a per-page basis, greatly increasing the ability of the Operating System to select the most efficient behavior for any given task.

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