Fast interrupt request
Fast interrupt request (FIQ) is a specialized type of interrupt request, which is a standard technique used in computer CPUs to deal with events that need to be processed as they occur, such as receiving data from a network card, or keyboard or mouse actions. FIQs are specific to the ARM architecture, which supports two types of interrupts; FIQs for fast, low-latency interrupt handling, and standard interrupt requests (IRQs), for more general interrupts.[1][2]
An FIQ takes priority over an IRQ in an ARM system. Also, only one FIQ source at a time is supported. This helps reduce interrupt latency as the interrupt service routine can be executed directly without determining the source of the interrupt. A context save is not required for servicing an FIQ since it has its own set of banked registers. This reduces the overhead of context switching.
FIQ mode has many banked register and hence not requiring major context switching i.e. the PUSH and POP operations. This is why it's called as fast interrupt.
FIQ is mainly used for data transfers like DMA operation.
FIQ or fast interrupts can be disabled by clearing the F bit in the CPSR(Current Program Status Register)
register
References
- ^ "Loading this site". Archived from the original on 2008-05-17. Retrieved 2014-02-10.
- ^ "Computers as Components: Principles of Embedded Computing System Design (3rd Edition)". Archived from the original on 22 Feb 2014.
External links
- Debugging ARM kernels using fast interrupts, LWN.net, May 29, 2014, by Daniel Thompson
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