Graph reduction machine
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A graph reduction machine is a special-purpose computer built to perform combinator calculations by graph reduction.
Examples include the SKIM ("S-K-I machine") computer, built at the University of Cambridge Computer Laboratory, and the multiprocessor GRIP ("Graph Reduction In Parallel") computer, built at University College London.[1] Another example is the Reduceron, a graph reduction machine, purpose built for Haskell, implemented on an FPGA.[2][3]
See also
References
- T. J. W. Clarke, P. Gladstone, C. MacLean, A. C. Norman: SKIM — The S, K, I Reduction Machine. LISP Conference, 1980: 128–135
External links
- Reduction Machines, Parallel Functional Programming: An Introduction, Kevin Hammond
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- ^ "Reduction Machines". web.archive.org. 31 July 2002. Retrieved 1 July 2023.
- ^ Naylor, Matthew; Runciman, Colin (2012). "The Reduceron reconfigured and re-evaluated". Journal of Functional Programming. 22 (4–5): 574–613. doi:10.1017/S0956796812000214. ISSN 1469-7653.
- ^ Naylor, Matthew; Runciman, Colin (2008). Chitil, Olaf; Horváth, Zoltán; Zsók, Viktória (eds.). "The Reduceron: Widening the von Neumann Bottleneck for Graph Reduction Using an FPGA". Implementation and Application of Functional Languages. Lecture Notes in Computer Science. Berlin, Heidelberg: Springer: 129–146. doi:10.1007/978-3-540-85373-2_8. ISBN 978-3-540-85373-2.