Flow to HDL
This page is to describe tools and methods that convert Flow based system design into hardware description languages like VHDL or Verilog. Typically this is a method of creating designs for Field-programmable_gate_array, ASIC prototyping and DSP design. Flow based system design is well suited to Field-programmable_gate_array FPGA design as it's easier to specify the inate parreleism of the architecture.
Discussion
There didn't seem to much link information on the various flow based system design to HDL tools and flows.
History
The use of flow based design tool in engineering is a reasonably new trend, most widely used example id UML for software design. More history required... There are other tools and flow that aim to achieve the same but with C or C like languages, these are discussed in the C_to_HDL page.
Applications
Application currently are mainly the sort of applications that currently take too long with existing supercomputer architectures. These may include Bioinfomatics, CFD, Financial processing, Oil and Gas survey data analysis. Embedded applications that require high performance or real-time data processing is also an area of use. Also System-on-a-chip design can be done using this flow.
Examples
- Xilinx System Generator
- StarBridge VIVA