„Advanced Vector Extensions“ – Versionsunterschied
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'''Advanced Vector Extensions''' (AVX) is an extension to the [[x86]] [[instruction set architecture]] for [[microprocessor]]s from [[Intel Corporation|Intel]] and [[Advanced Micro Devices|AMD]] proposed by Intel in March 2008.<ref>{{cite web | url=http://softwareprojects.intel.com/avx/ | title=Intel Software Network | publisher=Intel | accessdate=2008-04-05}}</ref>
AVX provides new features, new instructions and a new coding scheme.
==New features==
The width of the [[SIMD]] register file is increased from 128 bits to 256 bits, and renamed from [[Streaming SIMD Extensions#Registers|XMM]]0–XMM15 to YMM0–YMM15. In processors with AVX support, the legacy SSE instructions (which previously operated on 128-bit XMM registers) now operate on the lower 128 bits of the YMM registers. Further extensions to 512 or 1024 bits are expected in the future.{{
AVX introduces a three-operand SIMD instruction format, where the destination register is distinct from the two source operands. For example, an [[Streaming SIMD Extensions|SSE]] instruction using the conventional two-operand form ''a'' = ''a'' + ''b'' can now use a non-destructive three-operand form ''c'' = ''a'' + ''b'', preserving both source operands. AVX's three-operand format is limited to the instructions with [[SIMD]] operands (YMM), and does not include instructions with general purpose registers (e.g. EAX), but such support may be added in the future.{{
The [[Data structure alignment|alignment]] requirement of [[SIMD]] memory operands is relaxed.
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