| Display title | Verilog |
| Default sort key | Verilog |
| Page length (in bytes) | 33,831 |
| Namespace ID | 0 |
| Page ID | 63863 |
| Page content language | en - English |
| Page content model | wikitext |
| Indexing by robots | Allowed |
| Number of page watchers | 211 |
| Number of page watchers who visited in the last 30 days | 7 |
| Number of redirects to this page | 7 |
| Counted as a content page | Yes |
| Wikidata item ID | Q827773 |
| Local description | Hardware description language |
| Central description | hardware description language |
| Page views in the past 30 days | |
| Edit | Allow all users (no expiry set) |
| Move | Allow all users (no expiry set) |
| Page creator | Rcingham (talk | contribs) |
| Date of page creation | 02:44, 24 July 2002 |
| Latest editor | InternetArchiveBot (talk | contribs) |
| Date of latest edit | 07:20, 31 July 2025 |
| Total number of edits | 836 |
| Recent number of edits (within past 30 days) | 1 |
| Recent number of distinct authors | 1 |
| Hidden categories (7) | This page is a member of 7 hidden categories (help):
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| Transcluded templates (102) | Pages transcluded onto the current version of this page (help):
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| Wikidata entities used in this page | - Verilog
- Sitelink
- Title
- Description: en
- Some statements
- Miscellaneous (e.g. aliases, entity existence)
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| Background color inline style rule exists without a corresponding text color | 1 |
